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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 16:38:53 +09:00
![Adam Ford](/assets/img/avatar_default.png)
The DTS file for the AM3517 had the incorrect CD polarity. Resync with the fixed DTS file from Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
238 lines
6.2 KiB
Plaintext
238 lines
6.2 KiB
Plaintext
/*
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* Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com>
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*
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* Based on am3517-evm.dts
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd_core_reg>;
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};
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};
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wl12xx_buffer: wl12xx_buf {
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compatible = "regulator-fixed";
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regulator-name = "wl1271_buf";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_buffer_pins>;
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gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
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regulator-always-on;
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vin-supply = <&vdd_1v8_reg>;
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};
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wl12xx_vmmc2: wl12xx_vmmc2 {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_wkup_pins>;
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gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
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startup-delay-us = <70000>;
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enable-active-high;
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regulator-always-on;
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vin-supply = <&wl12xx_buffer>;
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};
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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linux,mtd-name = "micron,mt29f4g16abchch";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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gpmc,device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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s35390a: s35390a@30 {
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compatible = "sii,s35390a";
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reg = <0x30>;
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_pins>;
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interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
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};
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tps: tps65023@48 {
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compatible = "ti,tps65023";
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reg = <0x48>;
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regulators {
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vdd_core_reg: VDCDC1 {
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regulator-name = "vdd_core";
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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vdd_io_reg: VDCDC2 {
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regulator-name = "vdd_io";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_1v8_reg: VDCDC3 {
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regulator-name = "vdd_1v8";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vdd_usb18_reg: LDO1 {
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regulator-name = "vdd_usb18";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vdd_usb33_reg: LDO2 {
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regulator-name = "vdd_usb33";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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touchscreen: tsc2004@4b {
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compatible = "ti,tsc2004";
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reg = <0x4b>;
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vio-supply = <&vdd_io_reg>;
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pinctrl-names = "default";
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pinctrl-0 = <&tsc2004_pins>;
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interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
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touchscreen-fuzz-x = <4>;
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touchscreen-fuzz-y = <7>;
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touchscreen-fuzz-pressure = <2>;
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touchscreen-size-x = <480>;
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touchscreen-size-y = <272>;
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touchscreen-max-pressure = <2048>;
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ti,x-plate-ohms = <280>;
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ti,esd-recovery-timeout-ms = <8000>;
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};
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};
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&mmc2 {
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interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <&wl12xx_vmmc2>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1271";
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reg = <2>;
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interrupt-parent = <&gpio6>;
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interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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bluetooth {
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compatible = "ti,wl1271-st";
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enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
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max-speed = <3000000>;
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};
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};
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&omap3_pmx_core {
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wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_clk.mmc2_clk */
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OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_cmd.mmc2_cmd */
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OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat0.mmc2_dat0 */
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OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat1.mmc2_dat1 */
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OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat2.mmc2_dat2 */
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OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat3.mmc2_dat3 */
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OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
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OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
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OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
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OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
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OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */
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>;
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};
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rtc_pins: pinmux_rtc_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
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>;
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};
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tsc2004_pins: pinmux_tsc2004_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
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OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart2_rts */
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OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
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OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
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OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0) /* gpio_56 */
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>;
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};
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};
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&omap3_pmx_wkup {
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wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
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>;
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};
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};
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