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https://github.com/brain-hackers/u-boot-brain
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e6e505b93c
Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
/*
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* Sunxi A31 Power Management Unit
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*
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* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
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* http://linux-sunxi.org
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*
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* Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work
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*
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* (C) Copyright 2006-2013
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Berg Xing <bergxing@allwinnertech.com>
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* Tom Cubie <tangliang@allwinnertech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/prcm.h>
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#include <asm/arch/sys_proto.h>
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/* APB0 clock gate and reset bit offsets are the same. */
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void prcm_apb0_enable(u32 flags)
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{
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struct sunxi_prcm_reg *prcm =
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(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
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/* open the clock for module */
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setbits_le32(&prcm->apb0_gate, flags);
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/* deassert reset for module */
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setbits_le32(&prcm->apb0_reset, flags);
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}
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void prcm_apb0_disable(u32 flags)
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{
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struct sunxi_prcm_reg *prcm =
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(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
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/* assert reset for module */
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clrbits_le32(&prcm->apb0_reset, flags);
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/* close the clock for module */
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clrbits_le32(&prcm->apb0_gate, flags);
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}
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