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https://github.com/brain-hackers/u-boot-brain
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ae64226dbe
There is no need to clear the control register 100 times in a loop, a single zero write clears the register. I didn't find any justification why clearing this register in a loop is needed (no info in i.MX6 errata or GPT timer linux driver, linux driver uses single write to clear this control register). Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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.. | ||
mx5 | ||
mx6 | ||
mx7 | ||
mx7ulp | ||
cache.c | ||
cmd_bmode.c | ||
cmd_dek.c | ||
cmd_hdmidet.c | ||
cpu.c | ||
ddrmc-vf610.c | ||
hab.c | ||
i2c-mxv7.c | ||
imx_bootaux.c | ||
init.c | ||
iomux-v3.c | ||
Kconfig | ||
Makefile | ||
misc.c | ||
rdc-sema.c | ||
sata.c | ||
speed.c | ||
spl_sd.cfg | ||
spl.c | ||
syscounter.c | ||
timer.c | ||
video.c |