mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-14 07:06:19 +09:00
fa2f81b06f
On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
171 lines
4.5 KiB
C
171 lines
4.5 KiB
C
/*
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* (C) Copyright 2010
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* Texas Instruments Incorporated.
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* Aneesh V <aneesh@ti.com>
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* Steve Sakoman <steve@sakoman.com>
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*
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* TI OMAP4 common configuration settings
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_TI_OMAP4_COMMON_H
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#define __CONFIG_TI_OMAP4_COMMON_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP4430 1 /* which is in a 4430 */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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#define CONFIG_SYS_THUMB_BUILD
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310 1
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#define CONFIG_SYS_PL310_BASE 0x48242000
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#endif
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/* Get CPU defs */
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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/* Use General purpose timer 1 */
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#define CONFIG_SYS_TIMERBASE GPT2_BASE
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/*
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* Total Size Environment - 128k
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*/
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#define CONFIG_ENV_SIZE (128 << 10)
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/*
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* For the DDR timing information we can either dynamically determine
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* the timings to use or use pre-determined timings (based on using the
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* dynamic method. Default to the static timing infomation.
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*/
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#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
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#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
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#endif
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#include <configs/ti_armv7_omap.h>
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/*
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* Hardware drivers
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*/
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#define CONFIG_SYS_NS16550_CLK 48000000
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#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_COM3 UART3_BASE
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#endif
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#define CONFIG_CONS_INDEX 3
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/* TWL6030 */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_TWL6030_POWER 1
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#endif
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/* USB */
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#define CONFIG_USB_MUSB_UDC 1
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#define CONFIG_USB_OMAP3 1
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/* USB device configuration */
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/*
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* Environment setup
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*/
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#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
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"bootcmd_" #devtypel #instance "=" \
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"setenv mmcdev " #instance"; "\
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"setenv bootpart " #instance":2 ; "\
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"run mmcboot\0"
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#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
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#devtypel #instance " "
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#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
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#devtypel #instance " "
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(LEGACY_MMC, legacy_mmc, 0) \
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func(MMC, mmc, 1) \
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func(LEGACY_MMC, legacy_mmc, 1) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#define CONFIG_BOOTCOMMAND \
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"run findfdt; " \
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"run envboot; " \
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"run distro_bootcmd"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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DEFAULT_MMC_TI_ARGS \
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"console=ttyO2,115200n8\0" \
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"fdtfile=undefined\0" \
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"bootpart=0:2\0" \
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"bootdir=/boot\0" \
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"bootfile=zImage\0" \
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"usbtty=cdc_acm\0" \
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"vram=16M\0" \
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"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
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"mmcboot=echo Booting from mmc${mmcdev} ...; " \
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"run args_mmc; " \
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"if run loadimage; then " \
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"run loadfdt; " \
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"bootz ${loadaddr} - ${fdtaddr}; " \
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"fi;\0" \
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"uimageboot=echo Booting from mmc${mmcdev} ...; " \
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"run args_mmc; " \
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"bootm ${loadaddr}\0" \
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"findfdt="\
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"if test $board_name = sdp4430; then " \
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"setenv fdtfile omap4-sdp.dtb; fi; " \
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"if test $board_name = panda; then " \
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"setenv fdtfile omap4-panda.dtb; fi;" \
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"if test $board_name = panda-a4; then " \
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"setenv fdtfile omap4-panda-a4.dtb; fi;" \
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"if test $board_name = panda-es; then " \
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"setenv fdtfile omap4-panda-es.dtb; fi;" \
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"if test $board_name = duovero; then " \
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"setenv fdtfile omap4-duovero-parlor.dtb; fi;" \
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"if test $fdtfile = undefined; then " \
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"echo WARNING: Could not determine device tree to use; fi; \0" \
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"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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BOOTENV
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/*
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* Defines for SPL
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* It is known that this will break HS devices. Since the current size of
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* SPL is overlapped with public stack and breaking non HS devices to boot.
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* So moving TEXT_BASE down to non-HS limit.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x40300000
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#define CONFIG_SPL_DISPLAY_PRINT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
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(128 << 20))
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
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#endif
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#ifdef CONFIG_SPL_BUILD
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/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
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#undef CONFIG_SYS_I2C
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#undef CONFIG_SYS_I2C_OMAP24XX
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#undef CONFIG_SPL_I2C_SUPPORT
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#endif
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#endif /* __CONFIG_TI_OMAP4_COMMON_H */
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