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https://github.com/brain-hackers/u-boot-brain
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0b3ce83d7b
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM (under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399 in a Qseven compatible module. This subsumes the following changes: * defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA * defconfig: rk3399-puma: don't USE_TINY_PRINTF * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card * defconfig: rk3399-puma: enable GMAC support * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash * defconfig: rk3399-puma: enable SPI as a boot-source in SPL * defconfig: rk3399-puma: disallow non-FIT images from being loaded * defconfig: rk3399-puma: rename to puma-rk3399 * rockchip: config: rk3399: update defconfigs and rk3399_common For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD. This both follows how the BootROM probes devices and is a sane default for customers in device-personalisation (e.g. it allows for quick and easy factory programming of unpersonalised devices using an SD card) and field usage (with customer devices expected to have their firmware either in SPI or MMC). However, when probing multiple interfaces (according to the result from the board_boot_order function), we need to ensure that only valid FIT images are considered and disable the fallback to assuming that a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from jumping to random content loaded from devices that are probed, but don't contain valid image content). By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT options, we ensure that raw images (indistinguishable from random data) are not considered for booting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org> Drop CONFIG_DEBUG_UART_BOARD_INIT: Signed-off-by: Simon Glass <sjg@chromium.org>
63 lines
1.5 KiB
Plaintext
63 lines
1.5 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_OF_LIBFDT=y
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CONFIG_SPL_ATF_SUPPORT=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_ATF_TEXT_BASE=0x00010000
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x4000
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PXE=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_ROCKCHIP_RK3399_PINCTRL=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_STORAGE=y
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_ERRNO_STR=y
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