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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 02:49:44 +09:00
ad0513828e
There is no interrupt line for each PWM which used by pinctrl to get the periph_id, so it's not able to enable the default pinctrl setting by pinctrl framework, let's enable it at board_init(). Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
57 lines
1.1 KiB
C
57 lines
1.1 KiB
C
/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <asm/arch/periph.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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struct udevice *pinctrl;
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int ret;
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/*
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* The PWM do not have decicated interrupt number in dts and can
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* not get periph_id by pinctrl framework, so let's init them here.
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* The PWM2 and PWM3 are for pwm regulater.
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*/
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto out;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
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if (ret) {
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debug("%s PWM2 pinctrl init fail!\n", __func__);
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goto out;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3);
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if (ret) {
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debug("%s PWM3 pinctrl init fail!\n", __func__);
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goto out;
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}
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out:
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = 0x80000000;
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return 0;
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}
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void dram_init_banksize(void)
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{
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/* Reserve 0x200000 for ATF bl31 */
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gd->bd->bi_dram[0].start = 0x200000;
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gd->bd->bi_dram[0].size = 0x80000000;
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}
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