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![Lukas Auer](/assets/img/avatar_default.png)
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
16 lines
324 B
Plaintext
16 lines
324 B
Plaintext
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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config GENERIC_RISCV
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bool
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select ARCH_EARLY_INIT_R
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imply CPU
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imply CPU_RISCV
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imply RISCV_TIMER
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imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
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imply CMD_CPU
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imply SPL_CPU_SUPPORT
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imply SPL_OPENSBI
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imply SPL_LOAD_FIT
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