mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 17:08:52 +09:00
![Alexey Brodkin](/assets/img/avatar_default.png)
ARC HS Development Kit board is a new low-cost development platform sporting ARC HS38 in real silicon with nice set of features such as: * Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz * 4Gb of DDR (we use only lowest 1Gb out of it now) * Lots of DesigWare peripherals * Different connectivity modules: - Synopsys HAPS HT3 - Arduino-compatible connector - MikroBUS This initial commit supports the following peripherals: * UART (DW 8250) * Ethernet (DW GMAC) * SD/MMC (DW Mobile Storage) * USB 1.1 & 2.0 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
51 lines
829 B
Plaintext
51 lines
829 B
Plaintext
/*
|
|
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
/dts-v1/;
|
|
|
|
#include "skeleton.dtsi"
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
aliases {
|
|
console = &uart0;
|
|
};
|
|
|
|
cpu_card {
|
|
core_clk: core_clk {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <1000000000>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
};
|
|
|
|
uart0: serial0@f0005000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0xf0005000 0x1000>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
};
|
|
|
|
ethernet@f0008000 {
|
|
#interrupt-cells = <1>;
|
|
compatible = "altr,socfpga-stmmac";
|
|
reg = <0xf0008000 0x2000>;
|
|
phy-mode = "gmii";
|
|
};
|
|
|
|
ehci@0xf0040000 {
|
|
compatible = "generic-ehci";
|
|
reg = <0xf0040000 0x100>;
|
|
};
|
|
|
|
ohci@0xf0060000 {
|
|
compatible = "generic-ohci";
|
|
reg = <0xf0060000 0x100>;
|
|
};
|
|
};
|