mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 14:16:17 +09:00
5572367cc5
With this addition, the eMMC device available on the congatec and DFI BayTrail SoM is detected correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
58 lines
1.0 KiB
C
58 lines
1.0 KiB
C
/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mmc.h>
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#include <pci_ids.h>
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#include <asm/irq.h>
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#include <asm/mrccache.h>
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#include <asm/post.h>
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
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{},
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};
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int cpu_mmc_init(bd_t *bis)
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{
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return pci_mmc_init("ValleyView SDHCI", mmc_supported);
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}
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#ifndef CONFIG_EFI_APP
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int arch_cpu_init(void)
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{
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post_code(POST_CPU_INIT);
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return x86_cpu_init_f();
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}
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int arch_misc_init(void)
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{
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if (!ll_boot_init())
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return 0;
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#ifdef CONFIG_ENABLE_MRC_CACHE
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/*
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* We intend not to check any return value here, as even MRC cache
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* is not saved successfully, it is not a severe error that will
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* prevent system from continuing to boot.
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*/
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mrccache_save();
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#endif
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return 0;
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}
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#endif
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void reset_cpu(ulong addr)
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{
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/* cold reset */
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x86_full_reset();
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}
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