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https://github.com/brain-hackers/u-boot-brain
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![]() We were not comparing the SVRs properly previously. This comparison will properly shift the SVR and mask off the E bit This fixes the boot output to show the correct DDR bus width: 512 MiB (DDR3, 16-bit, CL=5, ECC off) instead of 512 MiB (DDR3, 32-bit, CL=5, ECC off) Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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amcc | ||
freescale | ||
karo/tx25 | ||
samsung/smdk6400 | ||
sheldon/simpc8313 |