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https://github.com/brain-hackers/u-boot-brain
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aba8004818
T1024QDS is a high-performance computing evaluation, development and test platform for T1024 QorIQ Power Architecture processor. T1024QDS board Overview ----------------------- - T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC - Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Three 1G/2.5Gbps SGMII ports - Four 1Gbps QSGMII ports - one 10Gbps XFI or 10Base-KR interface - SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora - PCIe: Three PCI Express controllers with five PCIe slots. - IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA - Video: DIU supports video up to 1280x1024x32 bpp. - Chrontel CH7201 for HDMI connection. - TI DS90C387R for direct LCD connection. - Raw (not encoded) video connector for testing or other encoders. - QUICC Engine block - 32-bit RISC controller for flexible support of the communications peripherals - Serial DMA channel for receive and transmit on all serial channels - Two universal communication controllers, supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - eSPI: Three SPI flash devices. - SATA: one SATA 2.O. - USB: Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB) - eSDHC: Support SD, SDHC, SDXC and MMC/eMMC. - I2C: Four I2C controllers. - UART: Two UART on board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT Fix Kconfig by adding SUPPORT_SPL] Reviewed-by: York Sun <yorksun@freescale.com>
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __T1024QDS_QIXIS_H__
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#define __T1024QDS_QIXIS_H__
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/* Definitions of QIXIS Registers for T1024/T1023 QDS */
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/* BRDCFG4[4:7]] select EC1 and EC2 as a pair */
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#define BRDCFG4_EMISEL_MASK 0xE0
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#define BRDCFG4_EMISEL_SHIFT 5
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/* BRDCFG5[0:1] controls routing and use of I2C3 & I2C4 ports*/
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#define BRDCFG5_IMX_MASK 0xC0
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#define BRDCFG5_IMX_DIU 0x80
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#define BRDCFG9_XFI_TX_DISABLE 0x10
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/* BRDCFG13[0:5] TDM configuration and setup */
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#define BRDCFG13_TDM_MASK 0xfc
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#define BRDCFG13_TDM_INTERFACE 0x37
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#define BRDCFG13_HDLC_LOOPBACK 0x29
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#define BRDCFG13_TDM_LOOPBACK 0x31
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/* BRDCFG15[3] controls LCD Panel Powerdown */
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#define BRDCFG15_LCDFM 0x20
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#define BRDCFG15_LCDPD 0x10
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#define BRDCFG15_LCDPD_MASK 0x10
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#define BRDCFG15_LCDPD_ENABLED 0x00
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/* BRDCFG15[6:7] controls DIU MUX selction*/
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#define BRDCFG15_DIUSEL_MASK 0x03
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#define BRDCFG15_DIUSEL_HDMI 0x00
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#define BRDCFG15_DIUSEL_LCD 0x01
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#define BRDCFG15_DIUSEL_UCC 0x10
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#define BRDCFG15_DIUSEL_TDM 0x11
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/* SYSCLK */
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#define QIXIS_SYSCLK_66 0x0
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#define QIXIS_SYSCLK_83 0x1
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#define QIXIS_SYSCLK_100 0x2
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#define QIXIS_SYSCLK_125 0x3
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#define QIXIS_SYSCLK_133 0x4
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#define QIXIS_SYSCLK_150 0x5
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#define QIXIS_SYSCLK_160 0x6
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#define QIXIS_SYSCLK_166 0x7
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#define QIXIS_SYSCLK_64 0x8
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/* DDRCLK */
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#define QIXIS_DDRCLK_66 0x0
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#define QIXIS_DDRCLK_100 0x1
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#define QIXIS_DDRCLK_125 0x2
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#define QIXIS_DDRCLK_133 0x3
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#define QIXIS_SRDS1CLK_122 0x5a
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#define QIXIS_SRDS1CLK_125 0x5e
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#endif
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