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![]() This patch adds the "nandecc" command to switch between the SPEAr600 internal 1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND chips with a stronger ECC than 1-bit, as on the x600. And to dynamically switch between both ECC schemes for backwards compatibility. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> |
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.. | ||
armada100 | ||
lpc32xx | ||
mx25 | ||
mx27 | ||
mxs | ||
omap | ||
orion5x | ||
spear | ||
cache.c | ||
cpu.c | ||
Makefile | ||
start.S |