mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-06 12:53:21 +09:00
![Paul Kocialkowski](/assets/img/avatar_default.png)
Now that we have a common prototype to grab the omap die id, functions to figure out a serial number and usb ethernet address can use it directly. Those also get an omap_die_id prefix for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
363 lines
8.0 KiB
C
363 lines
8.0 KiB
C
/*
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* (C) Copyright 2013
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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* Based on previous work by:
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* Aneesh V <aneesh@ti.com>
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* Steve Sakoman <steve@sakoman.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <palmas.h>
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#include <sata.h>
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#include <asm/gpio.h>
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#include <usb.h>
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#include <linux/usb/gadget.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/dra7xx_iodelay.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sata.h>
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#include <environment.h>
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#include <dwc3-uboot.h>
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#include <dwc3-omap-uboot.h>
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#include <ti-usb-phy-uboot.h>
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#include "mux_data.h"
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#ifdef CONFIG_DRIVER_TI_CPSW
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#include <cpsw.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/* GPIO 7_11 */
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#define GPIO_DDR_VTT_EN 203
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const struct omap_sysinfo sysinfo = {
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"Board: DRA7xx\n"
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};
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/**
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* @brief board_init
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*
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* @return 0
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*/
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int board_init(void)
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{
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gpmc_init();
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gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
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return 0;
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}
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int board_late_init(void)
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{
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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if (omap_revision() == DRA722_ES1_0)
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setenv("board_name", "dra72x");
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else
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setenv("board_name", "dra7xx");
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omap_die_id_serial();
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#endif
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return 0;
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}
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void set_muxconf_regs_essential(void)
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{
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do_set_mux32((*ctrl)->control_padconf_core_base,
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early_padconf, ARRAY_SIZE(early_padconf));
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}
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#ifdef CONFIG_IODELAY_RECALIBRATION
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void recalibrate_iodelay(void)
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{
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struct pad_conf_entry const *pads;
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struct iodelay_cfg_entry const *iodelay;
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int npads, niodelays;
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switch (omap_revision()) {
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case DRA722_ES1_0:
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pads = core_padconf_array_essential;
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npads = ARRAY_SIZE(core_padconf_array_essential);
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iodelay = iodelay_cfg_array;
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niodelays = ARRAY_SIZE(iodelay_cfg_array);
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break;
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case DRA752_ES1_0:
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case DRA752_ES1_1:
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pads = dra74x_core_padconf_array;
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npads = ARRAY_SIZE(dra74x_core_padconf_array);
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iodelay = dra742_es1_1_iodelay_cfg_array;
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niodelays = ARRAY_SIZE(dra742_es1_1_iodelay_cfg_array);
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break;
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default:
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case DRA752_ES2_0:
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pads = dra74x_core_padconf_array;
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npads = ARRAY_SIZE(dra74x_core_padconf_array);
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iodelay = dra742_es2_0_iodelay_cfg_array;
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niodelays = ARRAY_SIZE(dra742_es2_0_iodelay_cfg_array);
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/* Setup port1 and port2 for rgmii with 'no-id' mode */
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clrset_spare_register(1, 0, RGMII2_ID_MODE_N_MASK |
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RGMII1_ID_MODE_N_MASK);
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break;
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}
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__recalibrate_iodelay(pads, npads, iodelay, niodelays);
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}
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#endif
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
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int board_mmc_init(bd_t *bis)
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{
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omap_mmc_init(0, 0, 0, -1, -1);
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omap_mmc_init(1, 0, 0, -1, -1);
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return 0;
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}
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#endif
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device usb_otg_ss1 = {
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.maximum_speed = USB_SPEED_SUPER,
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.base = DRA7_USB_OTG_SS1_BASE,
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.tx_fifo_resize = false,
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.index = 0,
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};
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static struct dwc3_omap_device usb_otg_ss1_glue = {
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.base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE,
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.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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.index = 0,
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};
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static struct ti_usb_phy_device usb_phy1_device = {
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.pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL,
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.usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER,
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.usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER,
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.index = 0,
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};
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static struct dwc3_device usb_otg_ss2 = {
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.maximum_speed = USB_SPEED_SUPER,
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.base = DRA7_USB_OTG_SS2_BASE,
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.tx_fifo_resize = false,
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.index = 1,
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};
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static struct dwc3_omap_device usb_otg_ss2_glue = {
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.base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE,
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.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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.index = 1,
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};
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static struct ti_usb_phy_device usb_phy2_device = {
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.usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER,
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.index = 1,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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enable_usb_clocks(index);
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss1.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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ti_usb_phy_uboot_init(&usb_phy1_device);
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dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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dwc3_uboot_init(&usb_otg_ss1);
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss2.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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switch (index) {
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case 0:
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case 1:
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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disable_usb_clocks(index);
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return 0;
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}
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int usb_gadget_handle_interrupts(int index)
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{
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u32 status;
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status = dwc3_omap_uboot_interrupt_status(index);
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if (status)
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dwc3_uboot_handle_interrupt(index);
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return 0;
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}
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#endif
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
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int spl_start_uboot(void)
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{
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/* break into full u-boot on 'c' */
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if (serial_tstc() && serial_getc() == 'c')
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return 1;
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#ifdef CONFIG_SPL_ENV_SUPPORT
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env_init();
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env_relocate_spec();
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if (getenv_yesno("boot_os") != 1)
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return 1;
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#endif
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return 0;
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}
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#endif
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#ifdef CONFIG_DRIVER_TI_CPSW
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extern u32 *const omap_si_rev;
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static void cpsw_control(int enabled)
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{
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/* VTP can be added here */
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return;
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}
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static struct cpsw_slave_data cpsw_slaves[] = {
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{
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.slave_reg_ofs = 0x208,
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.sliver_reg_ofs = 0xd80,
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.phy_addr = 2,
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},
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{
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.slave_reg_ofs = 0x308,
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.sliver_reg_ofs = 0xdc0,
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.phy_addr = 3,
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},
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};
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static struct cpsw_platform_data cpsw_data = {
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.mdio_base = CPSW_MDIO_BASE,
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.cpsw_base = CPSW_BASE,
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.mdio_div = 0xff,
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.channels = 8,
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.cpdma_reg_ofs = 0x800,
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.slaves = 2,
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.slave_data = cpsw_slaves,
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.ale_reg_ofs = 0xd00,
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.ale_entries = 1024,
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.host_port_reg_ofs = 0x108,
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.hw_stats_reg_ofs = 0x900,
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.bd_ram_ofs = 0x2000,
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.mac_control = (1 << 5),
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.control = cpsw_control,
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.host_port_num = 0,
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.version = CPSW_CTRL_VERSION_2,
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};
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int board_eth_init(bd_t *bis)
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{
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int ret;
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uint8_t mac_addr[6];
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uint32_t mac_hi, mac_lo;
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uint32_t ctrl_val;
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/* try reading mac address from efuse */
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mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
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mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
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mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
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mac_addr[1] = (mac_hi & 0xFF00) >> 8;
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mac_addr[2] = mac_hi & 0xFF;
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mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
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mac_addr[4] = (mac_lo & 0xFF00) >> 8;
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mac_addr[5] = mac_lo & 0xFF;
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if (!getenv("ethaddr")) {
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printf("<ethaddr> not set. Validating first E-fuse MAC\n");
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if (is_valid_ethaddr(mac_addr))
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eth_setenv_enetaddr("ethaddr", mac_addr);
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}
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mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
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mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
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mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
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mac_addr[1] = (mac_hi & 0xFF00) >> 8;
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mac_addr[2] = mac_hi & 0xFF;
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mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
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mac_addr[4] = (mac_lo & 0xFF00) >> 8;
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mac_addr[5] = mac_lo & 0xFF;
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if (!getenv("eth1addr")) {
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if (is_valid_ethaddr(mac_addr))
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eth_setenv_enetaddr("eth1addr", mac_addr);
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}
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ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
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ctrl_val |= 0x22;
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writel(ctrl_val, (*ctrl)->control_core_control_io1);
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if (*omap_si_rev == DRA722_ES1_0)
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cpsw_data.active_slave = 1;
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ret = cpsw_register(&cpsw_data);
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if (ret < 0)
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printf("Error %d registering CPSW switch\n", ret);
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return ret;
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}
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#endif
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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/* VTT regulator enable */
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static inline void vtt_regulator_enable(void)
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{
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if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)
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return;
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/* Do not enable VTT for DRA722 */
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if (omap_revision() == DRA722_ES1_0)
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return;
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/*
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* EVM Rev G and later use gpio7_11 for DDR3 termination.
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* This is safe enough to do on older revs.
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*/
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gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
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gpio_direction_output(GPIO_DDR_VTT_EN, 1);
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}
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int board_early_init_f(void)
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{
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vtt_regulator_enable();
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return 0;
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}
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#endif
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