mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-24 03:49:43 +09:00
9171fc8172
All of the duplicated code for Blackfin processors and boot modes have been unified. After all, the core is the same for all processors, just the peripheral set differs (which gets handled in the drivers). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
235 lines
6.8 KiB
C
235 lines
6.8 KiB
C
/*
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* U-boot - Configuration file for BF561 EZKIT board
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*/
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#ifndef __CONFIG_EZKIT561_H__
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#define __CONFIG_EZKIT561_H__
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#include <asm/blackfin-config-pre.h>
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#define CFG_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_BAUDRATE 57600
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/* Set default serial console for bf537 */
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#define CONFIG_UART_CONSOLE 0
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#define CONFIG_EZKIT561 1
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_PANIC_HANG 1
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#define CONFIG_BFIN_CPU bf561-0.3
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
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/* This sets the default state of the cache on U-Boot's boot */
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#define CONFIG_ICACHE_ON
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#define CONFIG_DCACHE_ON
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/*
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* Board settings
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*/
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#define CONFIG_DRIVER_SMC91111 1
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#define CONFIG_SMC91111_BASE 0x2C010300
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#define CONFIG_ASYNC_EBIU_BASE CONFIG_SMC91111_BASE & ~(4*1024*1024)
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#define CONFIG_SMC_USE_32_BIT 1
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#define CONFIG_MISC_INIT_R 1
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/*
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* Clock settings
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*/
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/* CONFIG_CLKIN_HZ is any value in Hz */
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#define CONFIG_CLKIN_HZ 30000000
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/* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
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/* 1=CLKIN/2 */
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#define CONFIG_CLKIN_HALF 0
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/* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
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/* 1=bypass PLL */
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#define CONFIG_PLL_BYPASS 0
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/* CONFIG_VCO_MULT controls what the multiplier of the PLL is */
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/* Values can range from 1-64 */
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#define CONFIG_VCO_MULT 20
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/* CONFIG_CCLK_DIV controls what the core clock divider is */
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/* Values can be 1, 2, 4, or 8 ONLY */
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#define CONFIG_CCLK_DIV 1
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/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
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/* Values can range from 1-15 */
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#define CONFIG_SCLK_DIV 5
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/* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
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/* Values can range from 2-65535 */
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/* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */
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#define CONFIG_SPI_BAUD 2
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#define CONFIG_SPI_BAUD_INITBLOCK 4
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/*
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* Network settings
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*/
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#if (CONFIG_DRIVER_SMC91111)
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#define CONFIG_IPADDR 192.168.0.15
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_GATEWAYIP 192.168.0.1
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#define CONFIG_SERVERIP 192.168.0.2
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#define CONFIG_HOSTNAME ezkit561
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#define CONFIG_ROOTPATH /arm-cross-build/BF561/uClinux-dist/romfs
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#endif /* CONFIG_DRIVER_SMC91111 */
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/*
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* Flash settings
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*/
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#define CFG_FLASH_CFI /* The flash is CFI compatible */
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#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
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#define CFG_FLASH_CFI_AMD_RESET
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_FLASH_BASE 0x20000000
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
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#define CFG_ENV_ADDR 0x20020000
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#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
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/* JFFS Partition offset set */
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#define CFG_JFFS2_FIRST_BANK 0
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#define CFG_JFFS2_NUM_BANKS 1
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/* 512k reserved for u-boot */
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#define CFG_JFFS2_FIRST_SECTOR 8
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/*
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* SDRAM settings & memory map
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*/
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#define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
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#define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */
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#define CONFIG_MEM_MT48LC16M16A2TG_75 1
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
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#define CFG_MEMTEST_START 0x0 /* memtest works on */
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#define CFG_MEMTEST_END ( (CONFIG_MEM_SIZE - 1) * 1024*1024) /* 1 ... 63 MB in DRAM */
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#define CONFIG_LOADADDR 0x01000000 /* default load address */
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#define CFG_LOAD_ADDR CONFIG_LOADADDR
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#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
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#define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
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#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
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#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
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#define CFG_GBL_DATA_SIZE 0x4000
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#define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
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#define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#if ( CONFIG_CLKIN_HALF == 0 )
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#define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
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#else
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#define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
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#endif
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#if (CONFIG_PLL_BYPASS == 0)
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#define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
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#define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
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#else
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#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
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#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
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#endif
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/*
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* Command settings
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*/
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#define CFG_AUTOLOAD "no" /* rarpb, bootp, dhcp commands will */
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/* only perform a configuration */
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/* lookup from the BOOTP/DHCP server */
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/* but not try to load any image */
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/* using TFTP */
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#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, */
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/* currently its disabled */
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#define CONFIG_BOOTCOMMAND "run ramboot"
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#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
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#if (CONFIG_DRIVER_SMC91111)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \
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"$(rootpath) console=ttyBF0,57600\0" \
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"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \
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"$(gatewayip):$(netmask):$(hostname):eth0:off\0" \
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"ramboot=tftpboot $(loadaddr) linux; " \
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"run ramargs; run addip; bootelf\0" \
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"nfsboot=tftpboot $(loadaddr) linux; " \
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"run nfsargs; run addip; bootelf\0" \
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"update=tftpboot $(loadaddr) u-boot.bin; " \
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"protect off 0x20000000 0x2003FFFF; " \
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"erase 0x20000000 0x2003FFFF; " \
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"cp.b $(loadaddr) 0x20000000 $(filesize)\0" \
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""
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#else
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
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"flashboot=bootm 0x20100000\0" \
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""
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#endif
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_JFFS2
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#if defined(CONFIG_DRIVER_SMC91111)
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#endif
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/*
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* Console settings
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*/
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CFG_PROMPT "bfin> " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_LOADS_ECHO 1
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_HZ 1000 /* decrementer freq: 10 ms ticks */
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#define CFG_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
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/*
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* FLASH organization and environment definitions
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*/
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#define CONFIG_EBIU_SDRRC_VAL 0x306
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#define CONFIG_EBIU_SDGCTL_VAL 0x91114d
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#define CONFIG_EBIU_SDBCTL_VAL 0x15
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#define CONFIG_EBIU_AMGCTL_VAL 0x3F
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#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
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#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
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#include <asm/blackfin-config-post.h>
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#endif /* __CONFIG_EZKIT561_H__ */
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