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![]() MDIO clock needs to be initialized in u-boot code for SoCs having FMAN-v3(v3H or v3L) controller due to below reasons -On SoCs that have FMAN-v3H like B4860, default value of MDIO_CLK_DIV bits in mdio_stat(mdio_cfg) register generates mdio clock too high (much higher than 2.5MHz), violating the IEEE specs. -On SOCs that have FMAN-v3L like T1040, default value of MDIO_CLK_DIV bits is zero, so MDIO clock is disabled. So, for proper functioninig of MDIO, MDIO_CLK_DIV bits needs to be properly initialized. Also this type of initialization is generally done in PBI(pre-bootloader) phase using rcw.But for chips like T1040 which support deep-sleep, such type of initialization cannot be done in PBI phase due to the limitation that during deep-sleep resume, FMAN (MDIO) registers are not accessible in PBI phase. So, mdio clock initailization must be done as part of u-boot. This initialization code is implemented in memac_phy.c which gets compiled only for SoCs having FMANv3, so no extra compilation flag is required. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
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.. | ||
b4860.c | ||
dtsec.c | ||
eth.c | ||
fm.c | ||
fm.h | ||
init.c | ||
Makefile | ||
memac_phy.c | ||
memac.c | ||
p1023.c | ||
p4080.c | ||
p5020.c | ||
p5040.c | ||
t1040.c | ||
t2080.c | ||
t4240.c | ||
tgec_phy.c | ||
tgec.c |