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https://github.com/brain-hackers/u-boot-brain
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![Przemyslaw Marczak](/assets/img/avatar_default.png)
Old s5p gpio coding method was not clean and was not working properly for all parts and banks. New method is clean and easy to extend. Gpio coding mask: 0x000000ff - pin number 0x00ffff00 - bank offset 0xff000000 - part number Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
182 lines
3.4 KiB
C
182 lines
3.4 KiB
C
/*
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* (C) Copyright 2009 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#define S5P_GPIO_GET_BANK(x) ((x >> S5P_GPIO_BANK_SHIFT) \
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& S5P_GPIO_BANK_MASK)
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#define S5P_GPIO_GET_PIN(x) (x & S5P_GPIO_PIN_MASK)
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#define CON_MASK(x) (0xf << ((x) << 2))
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#define CON_SFR(x, v) ((v) << ((x) << 2))
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#define DAT_MASK(x) (0x1 << (x))
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#define DAT_SET(x) (0x1 << (x))
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#define PULL_MASK(x) (0x3 << ((x) << 1))
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#define PULL_MODE(x, v) ((v) << ((x) << 1))
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#define DRV_MASK(x) (0x3 << ((x) << 1))
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#define DRV_SET(x, m) ((m) << ((x) << 1))
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#define RATE_MASK(x) (0x1 << (x + 16))
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#define RATE_SET(x) (0x1 << (x + 16))
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void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
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{
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unsigned int value;
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value = readl(&bank->con);
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value &= ~CON_MASK(gpio);
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value |= CON_SFR(gpio, cfg);
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writel(value, &bank->con);
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}
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void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en)
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{
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s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
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s5p_gpio_set_value(bank, gpio, en);
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}
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void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio)
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{
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s5p_gpio_cfg_pin(bank, gpio, GPIO_INPUT);
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}
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void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)
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{
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unsigned int value;
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value = readl(&bank->dat);
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value &= ~DAT_MASK(gpio);
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if (en)
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value |= DAT_SET(gpio);
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writel(value, &bank->dat);
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}
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unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio)
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{
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unsigned int value;
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value = readl(&bank->dat);
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return !!(value & DAT_MASK(gpio));
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}
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void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->pull);
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value &= ~PULL_MASK(gpio);
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switch (mode) {
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case GPIO_PULL_DOWN:
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case GPIO_PULL_UP:
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value |= PULL_MODE(gpio, mode);
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break;
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default:
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break;
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}
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writel(value, &bank->pull);
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}
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void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->drv);
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value &= ~DRV_MASK(gpio);
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switch (mode) {
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case GPIO_DRV_1X:
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case GPIO_DRV_2X:
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case GPIO_DRV_3X:
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case GPIO_DRV_4X:
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value |= DRV_SET(gpio, mode);
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break;
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default:
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return;
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}
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writel(value, &bank->drv);
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}
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void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
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{
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unsigned int value;
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value = readl(&bank->drv);
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value &= ~RATE_MASK(gpio);
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switch (mode) {
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case GPIO_DRV_FAST:
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case GPIO_DRV_SLOW:
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value |= RATE_SET(gpio);
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break;
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default:
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return;
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}
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writel(value, &bank->drv);
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}
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struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
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{
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unsigned bank = S5P_GPIO_GET_BANK(gpio);
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unsigned base = s5p_gpio_base(gpio);
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return (struct s5p_gpio_bank *)(base + bank);
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}
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int s5p_gpio_get_pin(unsigned gpio)
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{
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return S5P_GPIO_GET_PIN(gpio);
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}
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/* Common GPIO API */
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int gpio_request(unsigned gpio, const char *label)
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{
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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return 0;
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}
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int gpio_direction_input(unsigned gpio)
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{
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s5p_gpio_direction_input(s5p_gpio_get_bank(gpio),
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s5p_gpio_get_pin(gpio));
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return 0;
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}
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int gpio_direction_output(unsigned gpio, int value)
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{
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s5p_gpio_direction_output(s5p_gpio_get_bank(gpio),
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s5p_gpio_get_pin(gpio), value);
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return 0;
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}
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int gpio_get_value(unsigned gpio)
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{
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return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio),
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s5p_gpio_get_pin(gpio));
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}
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int gpio_set_value(unsigned gpio, int value)
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{
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s5p_gpio_set_value(s5p_gpio_get_bank(gpio),
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s5p_gpio_get_pin(gpio), value);
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return 0;
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}
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