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![Chuanhua Han](/assets/img/avatar_default.png)
Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds boards. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
90 lines
1.4 KiB
Plaintext
90 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Freescale ls2080a QDS board device tree source
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*
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* Copyright 2013-2015 Freescale Semiconductor, Inc.
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*/
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/dts-v1/;
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#include "fsl-ls2080a.dtsi"
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/ {
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model = "Freescale Layerscape 2080a QDS Board";
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compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
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aliases {
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spi0 = &qspi;
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spi1 = &dspi;
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};
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};
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&i2c0 {
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status = "okay";
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pca9547@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00>;
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: s25fs256s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&sata {
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status = "okay";
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};
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