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https://github.com/brain-hackers/u-boot-brain
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f70409aff3
Because of peripheral devices can select clock sources, separate the peripheral clocks. (pwm, uart and so on) It just return the pclk at s5pc1xx SoC, but s5pc210 SoC must be calculated by own clock register setting. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/*
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* (C) Copyright 2009 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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* Heungjun Kim <riverful.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARM_ARCH_CLK_H_
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#define __ASM_ARM_ARCH_CLK_H_
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#define APLL 0
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#define MPLL 1
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#define EPLL 2
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#define HPLL 3
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#define VPLL 4
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void s5p_clock_init(void);
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extern unsigned long (*get_pll_clk)(int pllreg);
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extern unsigned long (*get_arm_clk)(void);
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extern unsigned long (*get_pwm_clk)(void);
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extern unsigned long (*get_uart_clk)(int dev_index);
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#endif
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