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a9961e5acd
u-boot-brain/arch/mips
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Weijie Gao a9961e5acd mips: mt7628: fix ddr_type for MT7688KN 
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.

This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-22 02:44:20 +02:00
..
cpu mips: enable _machine_restart for spl 2021-01-24 21:39:26 +01:00
dts net: jr2: Reset switch 2021-04-22 02:34:45 +02:00
include/asm common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
lib common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-ath79 common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-bmips common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-jz47xx common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-mscc common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-mtmips mips: mt7628: fix ddr_type for MT7688KN 2021-04-22 02:44:20 +02:00
mach-octeon common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
mach-pic32 common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig mips: mtmips: select SYSRESET for mt7628 only 2021-01-24 21:39:26 +01:00
Makefile mips: octeon: Initial minimal support for the Marvell Octeon SoC 2020-07-18 15:47:50 +02:00
Makefile.postlink SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00