Jagan Teki a976238de3 mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256 ... IS25WP256 flash chips do support 4byte address opcodes, so enable support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>		2020-04-30 22:34:20 +05:30
..
fsl_espi_spl.c	common: Move hang() to the same header as panic()	2020-01-17 17:53:40 -05:00
Kconfig	mtd: spi: SPI_FLASH_MTD depends on MTD	2019-12-04 17:10:51 -05:00
Makefile	mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD	2019-10-25 00:48:32 +05:30
sandbox.c	mtd: spi: Switch to new SPI NOR framework	2019-02-07 15:33:21 +05:30
sf_dataflash.c	mtd: spi_dataflash: Use spi read then write	2019-09-16 08:09:22 +05:30
sf_internal.h	mtd: spi-nor-core: Add octal mode support	2020-01-27 22:27:22 +05:30
sf_mtd.c	mtd: sf: Make sf_mtd.c more robust	2018-12-06 00:45:36 +05:30
sf_probe.c	mtd: spi: Export spi_flash_std_probe()	2019-12-15 11:44:24 +08:00
sf-uclass.c	dm: core: Create a new header file for 'compat' features	2020-02-05 19:33:46 -07:00
spi-nor-core.c	mtd: spi-nor: Enable QE bit for ISSI flash	2020-04-30 22:34:20 +05:30
spi-nor-ids.c	mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256	2020-04-30 22:34:20 +05:30
spi-nor-tiny.c	dm: core: Create a new header file for 'compat' features	2020-02-05 19:33:46 -07:00