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![Masahiro Yamada](/assets/img/avatar_default.png)
Merge init-*.c into a single file using a table of callbacks because the initialization flow is almost common among SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
210 lines
5.1 KiB
C
210 lines
5.1 KiB
C
/*
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <spl.h>
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#include "init.h"
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#include "micro-support-card.h"
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#include "soc-info.h"
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struct uniphier_spl_initdata {
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enum uniphier_soc_id soc_id;
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void (*bcu_init)(const struct uniphier_board_data *bd);
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void (*early_clk_init)(void);
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void (*sbc_init)(void);
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int (*dpll_init)(const struct uniphier_board_data *bd);
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int (*memconf_init)(const struct uniphier_board_data *bd);
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void (*dram_clk_init)(void);
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int (*umc_init)(const struct uniphier_board_data *bd);
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};
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static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
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#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
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{
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.soc_id = SOC_UNIPHIER_SLD3,
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.bcu_init = uniphier_sld3_bcu_init,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_sbc_init_admulti,
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.dpll_init = uniphier_sld3_dpll_init,
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.memconf_init = uniphier_memconf_3ch_no_disbit_init,
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.dram_clk_init = uniphier_sld3_dram_clk_init,
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.umc_init = uniphier_sld3_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD4)
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{
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.soc_id = SOC_UNIPHIER_LD4,
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.bcu_init = uniphier_ld4_bcu_init,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_ld4_sbc_init,
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.dpll_init = uniphier_ld4_dpll_init,
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.memconf_init = uniphier_memconf_2ch_init,
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.dram_clk_init = uniphier_sld3_dram_clk_init,
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.umc_init = uniphier_ld4_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
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{
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.soc_id = SOC_UNIPHIER_PRO4,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_sbc_init_savepin,
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.dpll_init = uniphier_pro4_dpll_init,
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.memconf_init = uniphier_memconf_2ch_init,
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.dram_clk_init = uniphier_sld3_dram_clk_init,
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.umc_init = uniphier_pro4_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
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{
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.soc_id = SOC_UNIPHIER_SLD8,
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.bcu_init = uniphier_ld4_bcu_init,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_ld4_sbc_init,
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.dpll_init = uniphier_sld8_dpll_init,
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.memconf_init = uniphier_memconf_2ch_init,
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.dram_clk_init = uniphier_sld3_dram_clk_init,
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.umc_init = uniphier_sld8_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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{
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.soc_id = SOC_UNIPHIER_PRO5,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_sbc_init_savepin,
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.dpll_init = uniphier_pro5_dpll_init,
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.memconf_init = uniphier_memconf_2ch_init,
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.dram_clk_init = uniphier_pro5_dram_clk_init,
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.umc_init = uniphier_pro5_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
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{
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.soc_id = SOC_UNIPHIER_PXS2,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_pxs2_sbc_init,
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.dpll_init = uniphier_pxs2_dpll_init,
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.memconf_init = uniphier_memconf_3ch_init,
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.dram_clk_init = uniphier_pxs2_dram_clk_init,
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.umc_init = uniphier_pxs2_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
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{
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.soc_id = SOC_UNIPHIER_LD6B,
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.early_clk_init = uniphier_sld3_early_clk_init,
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.sbc_init = uniphier_pxs2_sbc_init,
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.dpll_init = uniphier_pxs2_dpll_init,
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.memconf_init = uniphier_memconf_3ch_init,
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.dram_clk_init = uniphier_pxs2_dram_clk_init,
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.umc_init = uniphier_pxs2_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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{
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.soc_id = SOC_UNIPHIER_LD11,
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.early_clk_init = uniphier_ld11_early_clk_init,
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.sbc_init = uniphier_ld11_sbc_init,
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.dpll_init = uniphier_ld11_dpll_init,
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.memconf_init = uniphier_memconf_2ch_init,
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.dram_clk_init = uniphier_ld11_dram_clk_init,
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.umc_init = uniphier_ld11_umc_init,
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},
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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{
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.soc_id = SOC_UNIPHIER_LD20,
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.early_clk_init = uniphier_ld11_early_clk_init,
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.sbc_init = uniphier_ld11_sbc_init,
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.dpll_init = uniphier_ld20_dpll_init,
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.memconf_init = uniphier_memconf_3ch_init,
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.dram_clk_init = uniphier_ld20_dram_clk_init,
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.umc_init = uniphier_ld20_umc_init,
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},
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#endif
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};
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static const struct uniphier_spl_initdata *uniphier_get_spl_initdata(
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enum uniphier_soc_id soc_id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(uniphier_spl_initdata); i++) {
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if (uniphier_spl_initdata[i].soc_id == soc_id)
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return &uniphier_spl_initdata[i];
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}
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return NULL;
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}
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void spl_board_init(void)
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{
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const struct uniphier_board_data *bd;
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const struct uniphier_spl_initdata *initdata;
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enum uniphier_soc_id soc_id;
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int ret;
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#ifdef CONFIG_DEBUG_UART
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debug_uart_init();
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#endif
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bd = uniphier_get_board_param();
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if (!bd)
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hang();
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soc_id = uniphier_get_soc_type();
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initdata = uniphier_get_spl_initdata(soc_id);
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if (!initdata)
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hang();
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if (initdata->bcu_init)
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initdata->bcu_init(bd);
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initdata->sbc_init();
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initdata->early_clk_init();
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support_card_init();
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led_puts("L0");
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#ifdef CONFIG_SPL_SERIAL_SUPPORT
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preloader_console_init();
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#endif
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led_puts("L1");
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ret = initdata->dpll_init(bd);
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if (ret) {
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pr_err("failed to init DPLL\n");
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hang();
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}
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led_puts("L2");
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ret = initdata->memconf_init(bd);
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if (ret) {
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pr_err("failed to init MEMCONF\n");
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hang();
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}
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led_puts("L3");
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initdata->dram_clk_init();
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led_puts("L4");
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ret = initdata->umc_init(bd);
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if (ret) {
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pr_err("failed to init DRAM\n");
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hang();
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}
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led_puts("L5");
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}
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