mirror of
https://github.com/brain-hackers/u-boot-brain
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![Marcel Ziswiler](/assets/img/avatar_default.png)
Allow detecting whether or not U-Boot was launched through the recovery mode of the resp. NVIDIA SoC. Make use of a board specific arch_misc_init() and enable the same via CONFIG_ARCH_MISC_INIT configuration option. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
78 lines
1.7 KiB
C
78 lines
1.7 KiB
C
/*
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* Copyright (C) 2012 Lucas Stach
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/funcmux.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch-tegra/ap.h>
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#include <asm/arch-tegra/board.h>
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#include <asm/arch-tegra/tegra.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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int arch_misc_init(void)
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{
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if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
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NVBOOTTYPE_RECOVERY)
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printf("USB recovery mode\n");
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return 0;
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}
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#ifdef CONFIG_TEGRA_MMC
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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void pin_mux_mmc(void)
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{
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funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
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pinmux_tristate_disable(PMUX_PINGRP_GMB);
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}
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#endif
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#ifdef CONFIG_TEGRA_NAND
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void pin_mux_nand(void)
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{
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funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
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/*
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* configure pingroup ATC to something unrelated to
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* avoid ATC overriding KBC
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*/
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pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
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}
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#endif
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#ifdef CONFIG_USB_EHCI_TEGRA
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void pin_mux_usb(void)
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{
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/* module internal USB bus to connect ethernet chipset */
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funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
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/* ULPI reference clock output */
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pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
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pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
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/* PHY reset GPIO */
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pinmux_tristate_disable(PMUX_PINGRP_UAC);
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/* VBus GPIO */
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pinmux_tristate_disable(PMUX_PINGRP_DTE);
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/* Reset ASIX using LAN_RESET */
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gpio_request(GPIO_PV4, "LAN_RESET");
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gpio_direction_output(GPIO_PV4, 0);
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pinmux_tristate_disable(PMUX_PINGRP_GPV);
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udelay(5);
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gpio_set_value(GPIO_PV4, 1);
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/* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
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pinmux_tristate_disable(PMUX_PINGRP_SPIG);
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}
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#endif
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