mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 13:46:17 +09:00
a76df70908
This allows u-boot to load different OS or Bare Metal application on different cores of the i.MX6 SoC. For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
46 lines
1.0 KiB
C
46 lines
1.0 KiB
C
/*
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* (C) Copyright 2009
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <asm/imx-common/regs-common.h>
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#include "../arch-imx/cpu.h"
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#define soc_rev() (get_cpu_rev() & 0xFF)
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#define is_soc_rev(rev) (soc_rev() - rev)
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u32 get_nr_cpus(void);
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u32 get_cpu_rev(void);
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/* returns MXC_CPU_ value */
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#define cpu_type(rev) (((rev) >> 12)&0xff)
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/* use with MXC_CPU_ constants */
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#define is_cpu_type(cpu) (cpu_type(get_cpu_rev()) == cpu)
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const char *get_imx_type(u32 imxtype);
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unsigned imx_ddr_size(void);
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/*
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* Initializes on-chip ethernet controllers.
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* to override, implement board_eth_init()
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*/
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int fecmxc_initialize(bd_t *bis);
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u32 get_ahb_clk(void);
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u32 get_periph_clk(void);
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int mxs_reset_block(struct mxs_register_32 *reg);
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int mxs_wait_mask_set(struct mxs_register_32 *reg,
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uint32_t mask,
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unsigned int timeout);
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int mxs_wait_mask_clr(struct mxs_register_32 *reg,
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uint32_t mask,
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unsigned int timeout);
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#endif
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