mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
a751f83bb2
Call 'run update_uboot' to fetch u-boot-spl.kwb via TFTP and write it into the correct SPI flash location. The latter's size is defined in DS414's DTB file, so hard-coding it should be acceptable here. Take care to not append garbage from RAM to the written image and to stay within assigned flash boundaries even if an oversized image was fetched. Signed-off-by: Phil Sutter <phil@nwl.cc>
102 lines
2.6 KiB
C
102 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Stefan Roese <sr@denx.de>
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*/
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#ifndef _CONFIG_SYNOLOGY_DS414_H
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#define _CONFIG_SYNOLOGY_DS414_H
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/* Vendor kernel expects this MACH_TYPE */
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#define CONFIG_MACH_TYPE 3036
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/*
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* High Level Configuration Options (easy to change)
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*/
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/*
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* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MVTWSI
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#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PCIe support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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/* USB/EHCI/XHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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*/
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#include "mv-common.h"
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/*
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* Memory layout while starting into the bin_hdr via the
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* BootROM:
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*
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* 0x4000.4000 - 0x4003.4000 headers space (192KiB)
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* 0x4000.4030 bin_hdr start address
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* 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
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* 0x4007.fffc BootROM stack top
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*
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* The address space between 0x4007.fffc and 0x400f.fff is not locked in
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* L2 cache thus cannot be used.
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*/
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/* SPL */
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/* Defines for SPL */
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#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
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#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MALLOC_SIMPLE
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#endif
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
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/* SPL related SPI defines */
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#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
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#endif
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/* DS414 bus width is 32bits */
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#define CONFIG_DDR_32BIT
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/* Default Environment */
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#define CONFIG_LOADADDR 0x80000
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#define CONFIG_BOOTCOMMAND \
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"sf probe; " \
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"sf read ${loadaddr} 0xd0000 0x2d0000; " \
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"sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
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"bootm ${loadaddr} ${ramdisk_addr_r}"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"initrd_high=0xffffffff\0" \
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"ramdisk_addr_r=0x8000000\0" \
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"usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
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"ethmtu=1500\0eth1mtu=1500\0" \
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"update_uboot=sf probe; dhcp; " \
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"mw.b ${loadaddr} 0x0 0xd0000; " \
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"tftpboot ${loadaddr} u-boot-spl.kwb; " \
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"sf update ${loadaddr} 0x0 0xd0000\0"
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/* increase autoneg timeout, my NIC sucks */
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#define PHY_ANEG_TIMEOUT 16000
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#endif /* _CONFIG_SYNOLOGY_DS414_H */
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