mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
4c12eeb8b5
Change all files in common/ to use CMD_RET_USAGE instead of calling cmd_usage() directly. I'm not completely sure about this patch since the code since impact is small (100 byte or so on ARM) and it might need splitting into smaller patches. But for now here it is. Signed-off-by: Simon Glass <sjg@chromium.org>
384 lines
9.4 KiB
C
384 lines
9.4 KiB
C
/*
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* (C) Copyright 2000, 2001
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/*
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* FPGA support
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*/
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#include <common.h>
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#include <command.h>
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#if defined(CONFIG_CMD_NET)
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#include <net.h>
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#endif
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#include <fpga.h>
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#include <malloc.h>
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/* Local functions */
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static int fpga_get_op (char *opstr);
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/* Local defines */
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#define FPGA_NONE -1
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#define FPGA_INFO 0
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#define FPGA_LOAD 1
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#define FPGA_LOADB 2
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#define FPGA_DUMP 3
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#define FPGA_LOADMK 4
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/* Convert bitstream data and load into the fpga */
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int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
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{
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#if defined(CONFIG_FPGA_XILINX)
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unsigned int length;
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unsigned int swapsize;
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char buffer[80];
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unsigned char *dataptr;
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unsigned int i;
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int rc;
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dataptr = (unsigned char *)fpgadata;
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/* skip the first bytes of the bitsteam, their meaning is unknown */
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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dataptr+=length;
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/* get design name (identifier, length, string) */
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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if (*dataptr++ != 0x61) {
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debug("%s: Design name identifier not recognized "
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"in bitstream\n",
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__func__);
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return FPGA_FAIL;
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}
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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for(i=0;i<length;i++)
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buffer[i] = *dataptr++;
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printf(" design filename = \"%s\"\n", buffer);
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/* get part number (identifier, length, string) */
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if (*dataptr++ != 0x62) {
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printf("%s: Part number identifier not recognized "
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"in bitstream\n",
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__func__);
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return FPGA_FAIL;
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}
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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for(i=0;i<length;i++)
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buffer[i] = *dataptr++;
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printf(" part number = \"%s\"\n", buffer);
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/* get date (identifier, length, string) */
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if (*dataptr++ != 0x63) {
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printf("%s: Date identifier not recognized in bitstream\n",
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__func__);
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return FPGA_FAIL;
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}
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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for(i=0;i<length;i++)
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buffer[i] = *dataptr++;
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printf(" date = \"%s\"\n", buffer);
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/* get time (identifier, length, string) */
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if (*dataptr++ != 0x64) {
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printf("%s: Time identifier not recognized in bitstream\n",
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__func__);
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return FPGA_FAIL;
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}
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length = (*dataptr << 8) + *(dataptr+1);
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dataptr+=2;
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for(i=0;i<length;i++)
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buffer[i] = *dataptr++;
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printf(" time = \"%s\"\n", buffer);
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/* get fpga data length (identifier, length) */
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if (*dataptr++ != 0x65) {
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printf("%s: Data length identifier not recognized in bitstream\n",
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__func__);
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return FPGA_FAIL;
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}
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swapsize = ((unsigned int) *dataptr <<24) +
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((unsigned int) *(dataptr+1) <<16) +
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((unsigned int) *(dataptr+2) <<8 ) +
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((unsigned int) *(dataptr+3) ) ;
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dataptr+=4;
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printf(" bytes in bitstream = %d\n", swapsize);
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rc = fpga_load(dev, dataptr, swapsize);
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return rc;
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#else
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printf("Bitstream support only for Xilinx devices\n");
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return FPGA_FAIL;
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#endif
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}
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/* ------------------------------------------------------------------------- */
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/* command form:
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* fpga <op> <device number> <data addr> <datasize>
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* where op is 'load', 'dump', or 'info'
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* If there is no device number field, the fpga environment variable is used.
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* If there is no data addr field, the fpgadata environment variable is used.
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* The info command requires no data address field.
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*/
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int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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int op, dev = FPGA_INVALID_DEVICE;
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size_t data_size = 0;
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void *fpga_data = NULL;
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char *devstr = getenv ("fpga");
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char *datastr = getenv ("fpgadata");
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int rc = FPGA_FAIL;
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int wrong_parms = 0;
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#if defined (CONFIG_FIT)
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const char *fit_uname = NULL;
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ulong fit_addr;
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#endif
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if (devstr)
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dev = (int) simple_strtoul (devstr, NULL, 16);
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if (datastr)
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fpga_data = (void *) simple_strtoul (datastr, NULL, 16);
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switch (argc) {
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case 5: /* fpga <op> <dev> <data> <datasize> */
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data_size = simple_strtoul (argv[4], NULL, 16);
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case 4: /* fpga <op> <dev> <data> */
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#if defined(CONFIG_FIT)
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if (fit_parse_subimage (argv[3], (ulong)fpga_data,
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&fit_addr, &fit_uname)) {
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fpga_data = (void *)fit_addr;
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debug("* fpga: subimage '%s' from FIT image "
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"at 0x%08lx\n",
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fit_uname, fit_addr);
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} else
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#endif
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{
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fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
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debug("* fpga: cmdline image address = 0x%08lx\n",
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(ulong)fpga_data);
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}
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debug("%s: fpga_data = 0x%x\n", __func__, (uint) fpga_data);
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case 3: /* fpga <op> <dev | data addr> */
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dev = (int) simple_strtoul (argv[2], NULL, 16);
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debug("%s: device = %d\n", __func__, dev);
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/* FIXME - this is a really weak test */
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if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */
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debug("%s: Assuming buffer pointer in arg 3\n",
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__func__);
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#if defined(CONFIG_FIT)
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if (fit_parse_subimage (argv[2], (ulong)fpga_data,
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&fit_addr, &fit_uname)) {
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fpga_data = (void *)fit_addr;
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debug("* fpga: subimage '%s' from FIT image "
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"at 0x%08lx\n",
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fit_uname, fit_addr);
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} else
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#endif
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{
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fpga_data = (void *) dev;
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debug("* fpga: cmdline image address = "
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"0x%08lx\n", (ulong)fpga_data);
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}
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debug("%s: fpga_data = 0x%x\n",
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__func__, (uint) fpga_data);
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dev = FPGA_INVALID_DEVICE; /* reset device num */
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}
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case 2: /* fpga <op> */
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op = (int) fpga_get_op (argv[1]);
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break;
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default:
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debug("%s: Too many or too few args (%d)\n",
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__func__, argc);
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op = FPGA_NONE; /* force usage display */
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break;
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}
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if (dev == FPGA_INVALID_DEVICE) {
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puts("FPGA device not specified\n");
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op = FPGA_NONE;
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}
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switch (op) {
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case FPGA_NONE:
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case FPGA_INFO:
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break;
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case FPGA_LOAD:
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case FPGA_LOADB:
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case FPGA_DUMP:
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if (!fpga_data || !data_size)
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wrong_parms = 1;
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break;
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case FPGA_LOADMK:
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if (!fpga_data)
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wrong_parms = 1;
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break;
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}
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if (wrong_parms) {
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puts("Wrong parameters for FPGA request\n");
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op = FPGA_NONE;
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}
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switch (op) {
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case FPGA_NONE:
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return CMD_RET_USAGE;
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case FPGA_INFO:
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rc = fpga_info (dev);
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break;
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case FPGA_LOAD:
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rc = fpga_load (dev, fpga_data, data_size);
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break;
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case FPGA_LOADB:
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rc = fpga_loadbitstream(dev, fpga_data, data_size);
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break;
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case FPGA_LOADMK:
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switch (genimg_get_format (fpga_data)) {
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case IMAGE_FORMAT_LEGACY:
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{
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image_header_t *hdr = (image_header_t *)fpga_data;
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ulong data;
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data = (ulong)image_get_data (hdr);
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data_size = image_get_data_size (hdr);
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rc = fpga_load (dev, (void *)data, data_size);
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}
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break;
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#if defined(CONFIG_FIT)
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case IMAGE_FORMAT_FIT:
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{
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const void *fit_hdr = (const void *)fpga_data;
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int noffset;
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const void *fit_data;
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if (fit_uname == NULL) {
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puts ("No FIT subimage unit name\n");
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return 1;
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}
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if (!fit_check_format (fit_hdr)) {
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puts ("Bad FIT image format\n");
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return 1;
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}
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/* get fpga component image node offset */
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noffset = fit_image_get_node (fit_hdr, fit_uname);
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if (noffset < 0) {
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printf ("Can't find '%s' FIT subimage\n", fit_uname);
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return 1;
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}
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/* verify integrity */
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if (!fit_image_check_hashes (fit_hdr, noffset)) {
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puts ("Bad Data Hash\n");
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return 1;
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}
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/* get fpga subimage data address and length */
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if (fit_image_get_data (fit_hdr, noffset, &fit_data, &data_size)) {
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puts ("Could not find fpga subimage data\n");
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return 1;
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}
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rc = fpga_load (dev, fit_data, data_size);
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}
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break;
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#endif
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default:
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puts ("** Unknown image type\n");
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rc = FPGA_FAIL;
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break;
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}
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break;
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case FPGA_DUMP:
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rc = fpga_dump (dev, fpga_data, data_size);
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break;
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default:
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printf ("Unknown operation\n");
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return CMD_RET_USAGE;
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}
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return (rc);
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}
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/*
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* Map op to supported operations. We don't use a table since we
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* would just have to relocate it from flash anyway.
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*/
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static int fpga_get_op (char *opstr)
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{
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int op = FPGA_NONE;
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if (!strcmp ("info", opstr)) {
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op = FPGA_INFO;
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} else if (!strcmp ("loadb", opstr)) {
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op = FPGA_LOADB;
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} else if (!strcmp ("load", opstr)) {
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op = FPGA_LOAD;
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} else if (!strcmp ("loadmk", opstr)) {
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op = FPGA_LOADMK;
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} else if (!strcmp ("dump", opstr)) {
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op = FPGA_DUMP;
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}
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if (op == FPGA_NONE) {
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printf ("Unknown fpga operation \"%s\"\n", opstr);
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}
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return op;
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}
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U_BOOT_CMD (fpga, 6, 1, do_fpga,
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"loadable FPGA image support",
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"[operation type] [device number] [image address] [image size]\n"
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"fpga operations:\n"
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" dump\t[dev]\t\t\tLoad device to memory buffer\n"
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" info\t[dev]\t\t\tlist known device information\n"
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" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
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" loadb\t[dev] [address] [size]\t"
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"Load device from bitstream buffer (Xilinx only)\n"
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" loadmk [dev] [address]\tLoad device generated with mkimage"
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#if defined(CONFIG_FIT)
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"\n"
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"\tFor loadmk operating on FIT format uImage address must include\n"
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"\tsubimage unit name in the form of addr:<subimg_uname>"
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#endif
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);
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