mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-17 23:48:52 +09:00
![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* (C) Copyright 2012
|
|
* eInfochips Ltd. <www.einfochips.com>
|
|
* Written-by: Ajay Bhargav <contact@8051projects.net>
|
|
*
|
|
* (C) Copyright 2009
|
|
* Marvell Semiconductor <www.marvell.com>
|
|
*/
|
|
|
|
#ifndef __UTMI_ARMADA100__
|
|
#define __UTMI_ARMADA100__
|
|
|
|
#define UTMI_PHY_BASE 0xD4206000
|
|
|
|
/* utmi_ctrl - bits */
|
|
#define INPKT_DELAY_SOF (1 << 28)
|
|
#define PLL_PWR_UP 2
|
|
#define PHY_PWR_UP 1
|
|
|
|
/* utmi_pll - bits */
|
|
#define PLL_FBDIV_MASK 0x00000FF0
|
|
#define PLL_FBDIV 4
|
|
#define PLL_REFDIV_MASK 0x0000000F
|
|
#define PLL_REFDIV 0
|
|
#define PLL_READY 0x800000
|
|
#define VCOCAL_START (1 << 21)
|
|
|
|
#define N_DIVIDER 0xEE
|
|
#define M_DIVIDER 0x0B
|
|
|
|
/* utmi_tx - bits */
|
|
#define CK60_PHSEL 17
|
|
#define PHSEL_VAL 0x4
|
|
#define RCAL_START (1 << 12)
|
|
|
|
/*
|
|
* USB PHY registers
|
|
* Refer Datasheet Appendix A.21
|
|
*/
|
|
struct armd1usb_phy_reg {
|
|
u32 utmi_rev; /* USB PHY Revision */
|
|
u32 utmi_ctrl; /* USB PHY Control register */
|
|
u32 utmi_pll; /* PLL register */
|
|
u32 utmi_tx; /* Tx register */
|
|
u32 utmi_rx; /* Rx register */
|
|
u32 utmi_ivref; /* IVREF register */
|
|
u32 utmi_tst_g0; /* Test group 0 register */
|
|
u32 utmi_tst_g1; /* Test group 1 register */
|
|
u32 utmi_tst_g2; /* Test group 2 register */
|
|
u32 utmi_tst_g3; /* Test group 3 register */
|
|
u32 utmi_tst_g4; /* Test group 4 register */
|
|
u32 utmi_tst_g5; /* Test group 5 register */
|
|
u32 utmi_reserve; /* Reserve Register */
|
|
u32 utmi_usb_int; /* USB interuppt register */
|
|
u32 utmi_dbg_ctl; /* Debug control register */
|
|
u32 utmi_otg_addon; /* OTG addon register */
|
|
};
|
|
|
|
int utmi_init(void);
|
|
|
|
#endif /* __UTMI_ARMADA100__ */
|