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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
202 lines
6.3 KiB
C
202 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013
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* Texas Instruments Incorporated.
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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* Configuration settings for the TI DRA7XX board.
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* See ti_omap5_common.h for omap5 common settings.
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*/
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#ifndef __CONFIG_DRA7XX_EVM_H
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#define __CONFIG_DRA7XX_EVM_H
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#include <environment/ti/dfu.h>
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#define CONFIG_IODELAY_RECALIBRATION
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_MAX_MEM_MAPPED 0x80000000
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#ifndef CONFIG_QSPI_BOOT
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/* MMC ENV related defines */
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
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#define CONFIG_ENV_SIZE (128 << 10)
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#define CONFIG_ENV_OFFSET 0x260000
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#endif
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#if (CONFIG_CONS_INDEX == 1)
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#define CONSOLEDEV "ttyO0"
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#elif (CONFIG_CONS_INDEX == 3)
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#define CONSOLEDEV "ttyO2"
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#endif
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#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
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#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
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#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_OMAP_ABE_SYSCK
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#ifndef CONFIG_SPL_BUILD
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/* Define the default GPT table for eMMC */
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#define PARTS_DEFAULT \
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/* Linux partitions */ \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
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"name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
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/* Android partitions */ \
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"partitions_android=" \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
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"name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
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"name=environment,size=128K,uuid=${uuid_gpt_environment};" \
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"name=misc,size=128K,uuid=${uuid_gpt_misc};" \
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"name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
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"name=efs,size=16M,uuid=${uuid_gpt_efs};" \
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"name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
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"name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
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"name=boot,size=10M,uuid=${uuid_gpt_boot};" \
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"name=system,size=768M,uuid=${uuid_gpt_system};" \
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"name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
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"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
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"name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
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"name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
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"name=userdata,size=-,uuid=${uuid_gpt_userdata}"
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#define DFUARGS \
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"dfu_bufsiz=0x10000\0" \
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DFU_ALT_INFO_MMC \
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DFU_ALT_INFO_EMMC \
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DFU_ALT_INFO_RAM \
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DFU_ALT_INFO_QSPI
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#endif
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_CMD_BOOTD
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#ifdef CONFIG_SPL_DFU_SUPPORT
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#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
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#define DFUARGS \
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"dfu_bufsiz=0x10000\0" \
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DFU_ALT_INFO_RAM
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#endif
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#endif
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#include <configs/ti_omap5_common.h>
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/* Enhance our eMMC support / experience. */
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#define CONFIG_HSMMC2_8BIT
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/* CPSW Ethernet */
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_MII /* Required in net/eth.c */
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#define CONFIG_PHY_TI
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/* SPI */
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#define CONFIG_TI_SPI_MMAP
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#define CONFIG_SF_DEFAULT_SPEED 76800000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_QSPI_QUAD_SUPPORT
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/*
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* Default to using SPI for environment, etc.
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* 0x000000 - 0x040000 : QSPI.SPL (256KiB)
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* 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
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* 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
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* 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
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* 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
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* 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
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* 0x9E0000 - 0x2000000 : USERLAND
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*/
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#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
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#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
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#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
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#if defined(CONFIG_QSPI_BOOT)
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CONFIG_ENV_SIZE (64 << 10)
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#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
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#define CONFIG_ENV_OFFSET 0x1C0000
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#define CONFIG_ENV_OFFSET_REDUND 0x1D0000
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#endif
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/* SPI SPL */
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#define CONFIG_TI_EDMA3
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* USB xHCI HOST */
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#define CONFIG_USB_XHCI_OMAP
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#define CONFIG_OMAP_USB2PHY2_HOST
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/* SATA */
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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/* NAND support */
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#ifdef CONFIG_NAND
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/* NAND: device related configs */
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* NAND: driver related configs */
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
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/* NAND: SPL related configs */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
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#endif
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#endif /* !CONFIG_NAND */
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/* Parallel NOR Support */
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#if defined(CONFIG_NOR)
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/* NOR: device related configs */
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
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/* #define CONFIG_INIT_IGNORE_ERROR */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BASE (0x08000000)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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/* Reduce SPL size by removing unlikey targets */
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#ifdef CONFIG_NOR_BOOT
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#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
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#define CONFIG_ENV_OFFSET 0x001c0000
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#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
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#endif
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#endif /* NOR support */
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#endif /* __CONFIG_DRA7XX_EVM_H */
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