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https://github.com/brain-hackers/u-boot-brain
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20a58ac0d8
Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
24 lines
1.0 KiB
C
24 lines
1.0 KiB
C
/*
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* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* For some reason linker sets linker-generated symbols to zero in PIE mode.
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* A work-around is substitution of linker-generated symbols with
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* compiler-generated symbols which are properly handled by linker in PAE mode.
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*/
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char __bss_start[0] __attribute__((section(".__bss_start")));
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char __bss_end[0] __attribute__((section(".__bss_end")));
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char __image_copy_start[0] __attribute__((section(".__image_copy_start")));
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char __image_copy_end[0] __attribute__((section(".__image_copy_end")));
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char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));
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char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
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char __text_start[0] __attribute__((section(".__text_start")));
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char __text_end[0] __attribute__((section(".__text_end")));
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char __init_end[0] __attribute__((section(".__init_end")));
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char __ivt_start[0] __attribute__((section(".__ivt_start")));
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char __ivt_end[0] __attribute__((section(".__ivt_end")));
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