mirror of
https://github.com/brain-hackers/u-boot-brain
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ef639e6f70
[1] Align cache management functions to those in Linux kernel. I.e.:
a) Use the same functions for all cache ops (D$ Inv/Flush)
b) Split cache ops in 3 sub-functions: "before", "lineloop" and
"after". That way we may re-use "before" and "after" functions for
region and full cache ops.
[2] Implement full-functional L2 (SLC) management. Before SLC was
simply disabled early on boot. It's also possible to enable or disable
L2 cache from config utility.
[3] Disable/enable corresponding caches early on boot. So if U-Boot is
configured to use caches they will be used at all times (this is useful
in partucular for speed-up of relocation).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
37 lines
783 B
C
37 lines
783 B
C
/*
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* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARC_CACHE_H
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#define __ASM_ARC_CACHE_H
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#include <config.h>
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#ifdef CONFIG_ARC_CACHE_LINE_SHIFT
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#define CONFIG_SYS_CACHELINE_SIZE (1 << CONFIG_ARC_CACHE_LINE_SHIFT)
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#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
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#else
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/* Satisfy users of ARCH_DMA_MINALIGN */
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#define ARCH_DMA_MINALIGN 128
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#endif
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#if defined(ARC_MMU_ABSENT)
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#define CONFIG_ARC_MMU_VER 0
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#elif defined(CONFIG_ARC_MMU_V2)
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#define CONFIG_ARC_MMU_VER 2
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#elif defined(CONFIG_ARC_MMU_V3)
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#define CONFIG_ARC_MMU_VER 3
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#elif defined(CONFIG_ARC_MMU_V4)
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#define CONFIG_ARC_MMU_VER 4
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#endif
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#ifndef __ASSEMBLY__
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void cache_init(void);
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARC_CACHE_H */
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