Priyanka Jain f9d379a707 board/bsc9132qds: Configure DSP DDR controller ... BSC9132 SoC has two separate DDR controllers for PowerPC side and DSP side DDR. They are mapped to PowerPC and DSP CCSR space respectively. BSC9132QDS has two on-board MC34716EP DDR3 memory one connected to PowerPC and other to DSP side controller. Configure DSP DDR controller similar to PowerPC side DDR controller as memories are exactly similar. Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>		2013-08-09 12:41:40 -07:00
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arm	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
avr32	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
blackfin	blackfin: Fix using gd->baudrate before setting its value	2013-07-31 16:56:04 +08:00
m68k	Merge branch 'master' of git://git.denx.de/u-boot-i2c	2013-07-24 09:50:24 -04:00
microblaze	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
mips	MIPS: mips32/cache.S: use v1 register for indirect function calls	2013-07-24 09:51:07 -04:00
nds32	Merge branch 'master' of git://git.denx.de/u-boot-nds32	2013-07-25 08:51:51 -04:00
nios2	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
openrisc	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
powerpc	board/bsc9132qds: Configure DSP DDR controller	2013-08-09 12:41:40 -07:00
sandbox	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
sh	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
sparc	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
x86	config: don't define CONFIG_ARCH_DEVICE_TREE	2013-08-02 18:30:11 -04:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00