Marek Vasut a592e6fb7f arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 ... The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is set, it configures TTBR0 register. This register must be configured for the cache on ARMv7 to operate correctly. The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the TTBR0 is not configured at all. On SoCFPGA, this produces all sorts of minor issues which are hard to replicate, for example certain USB sticks are not detected or QSPI NOR sometimes fails to write pages completely. The solution is to replace CONFIG_ARMV7 test with CONFIG_CPU_V7 one. This is correct because the code which added the test(s) for CONFIG_ARMV7 was added shortly after CONFIG_ARMV7 was replaced by CONFIG_CPU_V7 and this code was not adjusted correctly to reflect that change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org>		2016-01-31 16:32:56 +01:00
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asm	arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7	2016-01-31 16:32:56 +01:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00