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https://github.com/brain-hackers/u-boot-brain
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![Simon Glass](/assets/img/avatar_default.png)
This function can fail if the device tree runs out of space. Rather than silently booting with an incomplete device tree, allow the failure to be detected. Unfortunately this involves changing a lot of places in the code. I have not changed behvaiour to return an error where one is not currently returned, to avoid unexpected breakage. Eventually it would be nice to allow boards to register functions to be called to update the device tree. This would avoid all the many functions to do this. However it's not clear yet if this should be done using driver model or with a linker list. This work is left for later. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
370 lines
9.4 KiB
C
370 lines
9.4 KiB
C
/*
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* (C) Copyright 2003-2007
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* (C) Copyright 2004-2005
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
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*
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* Adapted to U-Boot 1.2 by:
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* Bartlomiej Sieka <tur@semihalf.com>:
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* - HW ID readout from EEPROM
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* - module detection
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* Grzegorz Bernacki <gjb@semihalf.com>:
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* - run-time SDRAM controller configuration
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* - LIBFDT support
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mpc5xxx.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <i2c.h>
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#include <linux/ctype.h>
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#ifdef CONFIG_OF_LIBFDT
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#include <libfdt.h>
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#include <fdt_support.h>
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#endif /* CONFIG_OF_LIBFDT */
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#include "cm5200.h"
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#include "fwupdate.h"
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DECLARE_GLOBAL_DATA_PTR;
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static hw_id_t hw_id;
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#ifndef CONFIG_SYS_RAMBOOT
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/*
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* Helper function to initialize SDRAM controller.
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*/
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static void sdram_start(int hi_addr, mem_conf_t *mem_conf)
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{
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long hi_addr_bit = hi_addr ? 0x01000000 : 0;
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/* unlock mode register */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 |
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hi_addr_bit;
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 |
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hi_addr_bit;
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/* auto refresh */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
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hi_addr_bit;
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/* auto refresh, second time */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
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hi_addr_bit;
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/* set mode register */
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*(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode;
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/* normal operation */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit;
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}
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#endif /* CONFIG_SYS_RAMBOOT */
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/*
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* Retrieve memory configuration for a given module. board_type is the index
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* in hw_id_list[] corresponding to the module we are executing on; we return
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* SDRAM controller settings approprate for this module.
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*/
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static mem_conf_t* get_mem_config(int board_type)
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{
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switch(board_type){
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case CM1_QA:
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return memory_config[0];
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case CM11_QA:
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case CMU1_QA:
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return memory_config[1];
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default:
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printf("ERROR: Unknown module, using a default SDRAM "
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"configuration - things may not work!!!.\n");
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return memory_config[0];
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}
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}
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/*
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* Initalize SDRAM - configure SDRAM controller, detect memory size.
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*/
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phys_size_t initdram(int board_type)
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{
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ulong dramsize = 0;
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#ifndef CONFIG_SYS_RAMBOOT
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ulong test1, test2;
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mem_conf_t *mem_conf;
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mem_conf = get_mem_config(board_type);
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/* configure SDRAM start/end for detection */
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
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/* setup config registers */
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1;
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2;
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sdram_start(0, mem_conf);
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test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
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sdram_start(1, mem_conf);
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test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
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if (test1 > test2) {
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sdram_start(0, mem_conf);
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dramsize = test1;
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} else
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dramsize = test2;
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/* memory smaller than 1MB is impossible */
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if (dramsize < (1 << 20))
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dramsize = 0;
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/* set SDRAM CS0 size according to the amount of RAM found */
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if (dramsize > 0) {
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
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__builtin_ffs(dramsize >> 20) - 1;
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} else
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
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#else /* CONFIG_SYS_RAMBOOT */
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/* retrieve size of memory connected to SDRAM CS0 */
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
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if (dramsize >= 0x13)
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dramsize = (1 << (dramsize - 0x13)) << 20;
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else
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dramsize = 0;
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#endif /* !CONFIG_SYS_RAMBOOT */
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/*
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* On MPC5200B we need to set the special configuration delay in the
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* DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
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* the MPC5200B User's Manual.
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*/
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*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
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__asm__ volatile ("sync");
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return dramsize;
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}
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/*
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* Read module hardware identification data from the I2C EEPROM.
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*/
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static void read_hw_id(hw_id_t hw_id)
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{
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int i;
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for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
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if (i2c_read(CONFIG_SYS_I2C_EEPROM,
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hw_id_format[i].offset,
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2,
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(uchar *)&hw_id[i][0],
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hw_id_format[i].length) != 0)
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printf("ERROR: can't read HW ID from EEPROM\n");
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}
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/*
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* Identify module we are running on, set gd->board_type to the index in
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* hw_id_list[] corresponding to the module identifed, or to
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* CM5200_UNKNOWN_MODULE if we can't identify the module.
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*/
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static void identify_module(hw_id_t hw_id)
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{
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int i, j, element;
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char match;
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gd->board_type = CM5200_UNKNOWN_MODULE;
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for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) {
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match = 1;
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for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) {
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element = hw_id_identify[j];
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if (strncmp(hw_id_list[i][element],
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&hw_id[element][0],
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hw_id_format[element].length) != 0) {
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match = 0;
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break;
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}
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}
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if (match) {
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gd->board_type = i;
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break;
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}
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}
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}
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/*
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* Compose string with module name.
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* buf is assumed to have enough space, and be null-terminated.
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*/
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static void compose_module_name(hw_id_t hw_id, char *buf)
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{
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char tmp[MODULE_NAME_MAXLEN];
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strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
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strncat(buf, ".", 1);
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strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
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strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
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strncat(buf, " (", 2);
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strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0],
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hw_id_format[IDENTIFICATION_NUMBER].length);
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sprintf(tmp, " / %u.%u)",
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hw_id[MAJOR_SW_VERSION][0],
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hw_id[MINOR_SW_VERSION][0]);
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strcat(buf, tmp);
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}
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/*
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* Compose string with hostname.
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* buf is assumed to have enough space, and be null-terminated.
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*/
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static void compose_hostname(hw_id_t hw_id, char *buf)
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{
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char *p;
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strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
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strncat(buf, "_", 1);
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strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
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strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
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for (p = buf; *p; ++p)
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*p = tolower(*p);
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}
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#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
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/*
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* Update 'model' and 'memory' properties in the blob according to the module
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* that we are running on.
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*/
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static void ft_blob_update(void *blob, bd_t *bd)
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{
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int len, ret, nodeoffset = 0;
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char module_name[MODULE_NAME_MAXLEN] = {0};
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compose_module_name(hw_id, module_name);
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len = strlen(module_name) + 1;
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ret = fdt_setprop(blob, nodeoffset, "model", module_name, len);
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if (ret < 0)
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printf("ft_blob_update(): cannot set /model property err:%s\n",
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fdt_strerror(ret));
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}
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#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
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/*
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* Read HW ID from I2C EEPROM and detect the modue we are running on. Note
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* that we need to use local variable for readout, because global data is not
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* writable yet (and we'll have to redo the readout later on).
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*/
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int checkboard(void)
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{
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hw_id_t hw_id_tmp;
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char module_name_tmp[MODULE_NAME_MAXLEN] = "";
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/*
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* We need I2C to access HW ID data from EEPROM, so we call i2c_init()
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* here despite the fact that it will be called again later on. We
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* also use a little trick to silence I2C-related output.
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*/
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gd->flags |= GD_FLG_SILENT;
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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gd->flags &= ~GD_FLG_SILENT;
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read_hw_id(hw_id_tmp);
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identify_module(hw_id_tmp); /* this sets gd->board_type */
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compose_module_name(hw_id_tmp, module_name_tmp);
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if (gd->board_type != CM5200_UNKNOWN_MODULE)
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printf("Board: %s\n", module_name_tmp);
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else
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printf("Board: unrecognized cm5200 module (%s)\n",
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module_name_tmp);
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return 0;
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}
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int board_early_init_r(void)
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{
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/*
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* Now, when we are in RAM, enable flash write access for detection
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* process. Note that CS_BOOT cannot be cleared when executing in
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* flash.
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*/
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*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
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/* Now that we can write to global data, read HW ID again. */
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read_hw_id(hw_id);
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return 0;
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}
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
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uchar buf[6];
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char str[18];
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char hostname[MODULE_NAME_MAXLEN];
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/* Read ethaddr from EEPROM */
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if (i2c_read(CONFIG_SYS_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
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sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
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buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
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/* Check if MAC addr is owned by Schindler */
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if (strstr(str, "00:06:C3") != str)
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printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
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" in EEPROM.\n", str);
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else {
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printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
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str);
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setenv("ethaddr", str);
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}
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} else {
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printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
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" device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM,
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CONFIG_MAC_OFFSET);
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}
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#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */
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if (!getenv("ethaddr"))
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printf(LOG_PREFIX "MAC address not set, networking is not "
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"operational\n");
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/* set the hostname appropriate to the module we're running on */
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hostname[0] = 0x00;
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compose_hostname(hw_id, hostname);
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setenv("hostname", hostname);
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return 0;
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}
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#endif /* CONFIG_MISC_INIT_R */
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#ifdef CONFIG_LAST_STAGE_INIT
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int last_stage_init(void)
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{
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#ifdef CONFIG_USB_STORAGE
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cm5200_fwupdate();
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#endif /* CONFIG_USB_STORAGE */
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return 0;
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}
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#endif /* CONFIG_LAST_STAGE_INIT */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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ft_blob_update(blob, bd);
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return 0;
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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