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![Marek Vasut](/assets/img/avatar_default.png)
Since the RCar Gen3 no longer uses the SH SDHI driver, but rather uses the Matsushita SD driver, which loads all the properties from device tree, these macros are no longer used, remove them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
100 lines
2.2 KiB
C
100 lines
2.2 KiB
C
/*
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* ./arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_RCAR_GEN3_BASE_H
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#define __ASM_ARCH_RCAR_GEN3_BASE_H
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/*
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* R-Car (R8A7750) I/O Addresses
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*/
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#define RWDT_BASE 0xE6020000
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#define SWDT_BASE 0xE6030000
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#define LBSC_BASE 0xEE220200
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#define TMU_BASE 0xE61E0000
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#define GPIO5_BASE 0xE6055000
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/* SCIF */
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#define SCIF0_BASE 0xE6E60000
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#define SCIF1_BASE 0xE6E68000
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#define SCIF2_BASE 0xE6E88000
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#define SCIF3_BASE 0xE6C50000
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#define SCIF4_BASE 0xE6C40000
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#define SCIF5_BASE 0xE6F30000
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/* Module stop status register */
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#define MSTPSR0 0xE6150030
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#define MSTPSR1 0xE6150038
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#define MSTPSR2 0xE6150040
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#define MSTPSR3 0xE6150048
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#define MSTPSR4 0xE615004C
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#define MSTPSR5 0xE615003C
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#define MSTPSR6 0xE61501C0
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#define MSTPSR7 0xE61501C4
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#define MSTPSR8 0xE61509A0
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#define MSTPSR9 0xE61509A4
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#define MSTPSR10 0xE61509A8
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#define MSTPSR11 0xE61509AC
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/* Realtime module stop control register */
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#define RMSTPCR0 0xE6150110
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#define RMSTPCR1 0xE6150114
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#define RMSTPCR2 0xE6150118
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#define RMSTPCR3 0xE615011C
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#define RMSTPCR4 0xE6150120
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#define RMSTPCR5 0xE6150124
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#define RMSTPCR6 0xE6150128
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#define RMSTPCR7 0xE615012C
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#define RMSTPCR8 0xE6150980
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#define RMSTPCR9 0xE6150984
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#define RMSTPCR10 0xE6150988
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#define RMSTPCR11 0xE615098C
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/* System module stop control register */
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#define SMSTPCR0 0xE6150130
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#define SMSTPCR1 0xE6150134
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#define SMSTPCR2 0xE6150138
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#define SMSTPCR3 0xE615013C
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#define SMSTPCR4 0xE6150140
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#define SMSTPCR5 0xE6150144
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#define SMSTPCR6 0xE6150148
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#define SMSTPCR7 0xE615014C
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#define SMSTPCR8 0xE6150990
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#define SMSTPCR9 0xE6150994
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#define SMSTPCR10 0xE6150998
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#define SMSTPCR11 0xE615099C
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/* PFC */
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#define PFC_PUEN5 0xE6060414
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#define PUEN_SSI_SDATA4 BIT(17)
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#define PFC_PUEN6 0xE6060418
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#define PUEN_USB1_OVC (1 << 2)
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#define PUEN_USB1_PWEN (1 << 1)
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/* IICDVFS (I2C) */
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#define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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/* RWDT */
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struct rcar_rwdt {
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u32 rwtcnt;
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u32 rwtcsra;
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u32 rwtcsrb;
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};
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/* SWDT */
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struct rcar_swdt {
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u32 swtcnt;
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u32 swtcsra;
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u32 swtcsrb;
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};
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#endif
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#endif /* __ASM_ARCH_RCAR_GEN3_BASE_H */
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