Suman Anna a517c1f62f ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernels ... The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPP") updates the kernel device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks DT node. The hierarchy of this clocks DT node has changed in newer Linux kernels starting from v5.0, and this results in a failure in ft_fixup_clocks() function to update the clock rates on these newer kernels. Fix this by updating the lookup logic to look through both the newer and older DT hierarchy paths for the cm_core_aon clocks node. Signed-off-by: Suman Anna <s-anna@ti.com>		2019-08-20 11:46:38 -04:00
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arc	CONFIG_SPL_SYS_[DI]CACHE_OFF: add	2019-05-18 08:15:35 -04:00
arm	ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernels	2019-08-20 11:46:38 -04:00
m68k	env: Drop environment.h header file where not needed	2019-08-11 16:43:41 -04:00
microblaze	env: Move env_get() to env.h	2019-08-11 16:43:41 -04:00
mips	env: Move env_init() to env.h	2019-08-11 16:43:41 -04:00
nds32	env: Drop environment.h header file where not needed	2019-08-11 16:43:41 -04:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell	2019-08-12 23:03:44 -04:00
riscv	riscv: Access CSRs using CSR numbers	2019-08-15 13:42:28 +08:00
sandbox	sysreset: switch to using SYSRESET_POWER_OFF for poweroff	2019-08-19 12:43:26 +08:00
sh	sh: r0p7734: Remove the board	2019-06-14 12:42:06 +02:00
x86	x86: Remove x86 specific GD flags as they are not referenced at all	2019-08-18 21:54:10 +08:00
xtensa	env: Move env_get() to env.h	2019-08-11 16:43:41 -04:00
.gitignore
Kconfig	sysreset: move stm32mp sysreset poweroff implementation to sysreset uclass	2019-08-19 12:43:26 +08:00