mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 10:59:43 +09:00
a38a3c4af4
T124/210 requires some specific configuration (VPR setup) to be performed by the bootloader before the GPU can be used. For this reason, the GPU node in the device tree is disabled by default. This patch enables the node if U-boot has performed VPR configuration. Boards enabled by this patch are T124's Jetson TK1 and Venice2 and T210's P2571. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
90 lines
1.7 KiB
C
90 lines
1.7 KiB
C
/*
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* (C) Copyright 2014
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <power/as3722.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch-tegra/gpu.h>
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#include "pinmux-config-jetson-tk1.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_clear_tristate_input_clamping();
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gpio_config_table(jetson_tk1_gpio_inits,
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ARRAY_SIZE(jetson_tk1_gpio_inits));
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pinmux_config_pingrp_table(jetson_tk1_pingrps,
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ARRAY_SIZE(jetson_tk1_pingrps));
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pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
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ARRAY_SIZE(jetson_tk1_drvgrps));
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}
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#ifdef CONFIG_PCI_TEGRA
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int tegra_pcie_board_init(void)
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{
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struct udevice *pmic;
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int err;
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err = as3722_init(&pmic);
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if (err) {
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error("failed to initialize AS3722 PMIC: %d\n", err);
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return err;
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}
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err = as3722_sd_enable(pmic, 4);
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if (err < 0) {
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error("failed to enable SD4: %d\n", err);
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return err;
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}
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err = as3722_sd_set_voltage(pmic, 4, 0x24);
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if (err < 0) {
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error("failed to set SD4 voltage: %d\n", err);
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return err;
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}
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err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH |
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AS3722_GPIO_INVERT);
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if (err < 0) {
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error("failed to configure GPIO#1 as output: %d\n", err);
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return err;
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}
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err = as3722_gpio_direction_output(pmic, 2, 1);
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if (err < 0) {
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error("failed to set GPIO#2 high: %d\n", err);
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return err;
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}
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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#endif /* PCI */
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int ft_board_setup(void *blob, bd_t *bd)
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{
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gpu_enable_node(blob, "/gpu@0,57000000");
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return 0;
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}
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