Akshay Saraswat a389531439 Exynos542x: Add workaround for ARM errata 799270 ... This patch adds workaround for the ARM errata 799270 which says "If the L2 cache logic clock is stopped because of L2 inactivity, setting or clearing the ACTLR.SMP bit might not be effective. The bit is modified in the ACTLR, meaning a read of the register returns the updated value. However the logic that uses that bit retains the previous value." Signed-off-by: Kimoon Kim <kimoon.kim@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>		2015-02-28 18:03:46 +09:00
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asm	Exynos542x: Add workaround for ARM errata 799270	2015-02-28 18:03:46 +09:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00