u-boot-brain/arch/riscv/cpu/ax25
Pragnesh Patel 5988bb9dbf riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
CONFIG_IS_ENABLED(FOO) will check FOO config option for U-Boot,
SPL and TPL, so remove unnecessary CONFIG_IS_ENABLED()

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:13:23 +08:00
..
cache.c riscv: ax25: cache: Remove SPL_RISCV_MMODE config check 2020-04-23 10:13:23 +08:00
cpu.c common: Move ARM cache operations out of common.h 2019-12-02 18:24:58 -05:00
Kconfig riscv: ax25: add SPL support 2019-12-10 08:23:10 +08:00
Makefile riscv: cache: Implement i/dcache [status, enable, disable] 2018-11-26 13:58:01 +08:00