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https://github.com/brain-hackers/u-boot-brain
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c1a215b455
Pulled in the kmcent2.dts and all its dependents from Linux 5.10, commit 2c85ebc57b3e upstream. Replaced the license text with SPDX License Identifiers. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
89 lines
1.6 KiB
Plaintext
89 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* T1040/T1042 Silicon/SoC Device Tree Source (pre include)
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*
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* Copyright 2013-2014 Freescale Semiconductor Inc.
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*/
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/dts-v1/;
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/include/ "e5500_power_isa.dtsi"
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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aliases {
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ccsr = &soc;
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dcsr = &dcsr;
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serial0 = &serial0;
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serial1 = &serial1;
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serial2 = &serial2;
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serial3 = &serial3;
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pci0 = &pci0;
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pci1 = &pci1;
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pci2 = &pci2;
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pci3 = &pci3;
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usb0 = &usb0;
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usb1 = &usb1;
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sdhc = &sdhc;
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crypto = &crypto;
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fman0 = &fman0;
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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ethernet2 = &enet2;
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ethernet3 = &enet3;
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ethernet4 = &enet4;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: PowerPC,e5500@0 {
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device_type = "cpu";
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reg = <0>;
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clocks = <&clockgen 1 0>;
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next-level-cache = <&L2_1>;
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#cooling-cells = <2>;
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L2_1: l2-cache {
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next-level-cache = <&cpc>;
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};
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};
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cpu1: PowerPC,e5500@1 {
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device_type = "cpu";
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reg = <1>;
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clocks = <&clockgen 1 1>;
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next-level-cache = <&L2_2>;
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#cooling-cells = <2>;
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L2_2: l2-cache {
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next-level-cache = <&cpc>;
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};
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};
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cpu2: PowerPC,e5500@2 {
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device_type = "cpu";
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reg = <2>;
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clocks = <&clockgen 1 2>;
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next-level-cache = <&L2_3>;
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#cooling-cells = <2>;
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L2_3: l2-cache {
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next-level-cache = <&cpc>;
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};
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};
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cpu3: PowerPC,e5500@3 {
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device_type = "cpu";
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reg = <3>;
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clocks = <&clockgen 1 3>;
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next-level-cache = <&L2_4>;
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#cooling-cells = <2>;
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L2_4: l2-cache {
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next-level-cache = <&cpc>;
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};
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};
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};
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};
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