mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
145 lines
4.5 KiB
C
145 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h]
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*
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* (C) 2007 Atmel Corporation.
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* (C) Copyright 2010
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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*
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* Definitions for the SoC:
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* AT91SAM9263
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*/
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#ifndef AT91SAM9263_H
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#define AT91SAM9263_H
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/*
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* Peripheral identifiers/interrupts.
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*/
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#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
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#define ATMEL_ID_SYS 1 /* System Peripherals */
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#define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */
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#define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */
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#define ATMEL_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */
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/* Reserved: 5 */
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/* Reserved: 6 */
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#define ATMEL_ID_USART0 7 /* USART 0 */
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#define ATMEL_ID_USART1 8 /* USART 1 */
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#define ATMEL_ID_USART2 9 /* USART 2 */
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#define ATMEL_ID_MCI0 10 /* Multimedia Card Interface 0 */
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#define ATMEL_ID_MCI1 11 /* Multimedia Card Interface 1 */
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#define ATMEL_ID_CAN 12 /* CAN */
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#define ATMEL_ID_TWI 13 /* Two-Wire Interface */
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#define ATMEL_ID_SPI0 14 /* Serial Peripheral Interface 0 */
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#define ATMEL_ID_SPI1 15 /* Serial Peripheral Interface 1 */
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#define ATMEL_ID_SSC0 16 /* Serial Synchronous Controller 0 */
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#define ATMEL_ID_SSC1 17 /* Serial Synchronous Controller 1 */
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#define ATMEL_ID_AC97C 18 /* AC97 Controller */
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#define ATMEL_ID_TCB 19 /* Timer Counter 0, 1 and 2 */
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#define ATMEL_ID_PWMC 20 /* Pulse Width Modulation Controller */
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#define ATMEL_ID_EMAC 21 /* Ethernet */
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/* Reserved: 22 */
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#define ATMEL_ID_2DGE 23 /* 2D Graphic Engine */
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#define ATMEL_ID_UDP 24 /* USB Device Port */
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#define ATMEL_ID_ISI 25 /* Image Sensor Interface */
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#define ATMEL_ID_LCDC 26 /* LCD Controller */
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#define ATMEL_ID_DMA 27 /* DMA Controller */
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/* Reserved: 28 */
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#define ATMEL_ID_UHP 29 /* USB Host port */
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#define ATMEL_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */
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#define ATMEL_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */
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/*
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* User Peripherals physical base addresses.
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*/
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#define ATMEL_BASE_UDP 0xfff78000
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#define ATMEL_BASE_TCB0 0xfff7c000
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#define ATMEL_BASE_TC0 0xfff7c000
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#define ATMEL_BASE_TC1 0xfff7c040
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#define ATMEL_BASE_TC2 0xfff7c080
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#define ATMEL_BASE_MCI0 0xfff80000
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#define ATMEL_BASE_MCI1 0xfff84000
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#define ATMEL_BASE_TWI 0xfff88000
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#define ATMEL_BASE_USART0 0xfff8c000
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#define ATMEL_BASE_USART1 0xfff90000
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#define ATMEL_BASE_USART2 0xfff94000
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#define ATMEL_BASE_SSC0 0xfff98000
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#define ATMEL_BASE_SSC1 0xfff9c000
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#define ATMEL_BASE_AC97C 0xfffa0000
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#define ATMEL_BASE_SPI0 0xfffa4000
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#define ATMEL_BASE_SPI1 0xfffa8000
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#define ATMEL_BASE_CAN 0xfffac000
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#define ATMEL_BASE_PWMC 0xfffb8000
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#define ATMEL_BASE_EMAC 0xfffbc000
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#define ATMEL_BASE_ISI 0xfffc4000
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#define ATMEL_BASE_2DGE 0xfffc8000
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/*
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* System Peripherals physical base addresses.
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*/
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#define ATMEL_BASE_ECC0 0xffffe000
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#define ATMEL_BASE_SDRAMC0 0xffffe200
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#define ATMEL_BASE_SMC0 0xffffe400
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#define ATMEL_BASE_ECC1 0xffffe600
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#define ATMEL_BASE_SDRAMC1 0xffffe800
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#define ATMEL_BASE_SMC1 0xffffea00
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#define ATMEL_BASE_MATRIX 0xffffec00
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#define ATMEL_BASE_CCFG 0xffffed10
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#define ATMEL_BASE_DBGU 0xffffee00
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#define ATMEL_BASE_AIC 0xfffff000
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#define ATMEL_BASE_PIOA 0xfffff200
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#define ATMEL_BASE_PIOB 0xfffff400
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#define ATMEL_BASE_PIOC 0xfffff600
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#define ATMEL_BASE_PIOD 0xfffff800
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#define ATMEL_BASE_PIOE 0xfffffa00
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#define ATMEL_BASE_PMC 0xfffffc00
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#define ATMEL_BASE_RSTC 0xfffffd00
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#define ATMEL_BASE_SHDWC 0xfffffd10
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#define ATMEL_BASE_RTT0 0xfffffd20
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#define ATMEL_BASE_PIT 0xfffffd30
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#define ATMEL_BASE_WDT 0xfffffd40
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#define ATMEL_BASE_RTT1 0xfffffd50
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#define ATMEL_BASE_GPBR 0xfffffd60
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/*
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* Internal Memory.
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*/
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#define ATMEL_BASE_SRAM0 0x00300000 /* Internal SRAM 0 */
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#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM */
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#define ATMEL_BASE_SRAM1 0x00500000 /* Internal SRAM 1 */
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#define ATMEL_BASE_LCDC 0x00700000 /* LCD Controller */
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#define ATMEL_BASE_DMAC 0x00800000 /* DMA Controller */
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#define ATMEL_BASE_UHP 0x00a00000 /* USB Host controller */
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/*
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* External memory
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*/
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#define ATMEL_BASE_CS0 0x10000000 /* typically NOR */
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#define ATMEL_BASE_CS1 0x20000000 /* SDRAM */
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#define ATMEL_BASE_CS2 0x30000000
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#define ATMEL_BASE_CS3 0x40000000 /* typically NAND */
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#define ATMEL_BASE_CS4 0x50000000
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#define ATMEL_BASE_CS5 0x60000000
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#define ATMEL_BASE_CS6 0x70000000
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#define ATMEL_BASE_CS7 0x80000000
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/* Timer */
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#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
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/*
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* Other misc defines
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*/
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#define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */
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#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/*
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* Cpu Name
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*/
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#define ATMEL_CPU_NAME "AT91SAM9263"
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#endif
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