u-boot-brain/doc/README.fsl-hwconfig
Timur Tabi a2d12f8812 p1022ds: add audclk hwconfig setting to enable codec reference clock
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled.  Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.

The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz.  The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.

Also configure a pin muxing to select some SSI signals, which will disable
I2C1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00

22 lines
751 B
Plaintext

Freescale-specific 'hwconfig' options.
This file documents Freescale-specific key:value pairs for the 'hwconfig'
option. See README.hwconfig for general information about 'hwconfig'.
audclk
Specific to the P1022DS reference board.
This option specifies which of the two oscillator frequencies should be
routed to the Wolfson WM8776 codec. The ngPIXIS can be programmed to
route either a 11.2896MHz or a 12.288MHz clock. The default is
12.288MHz. This option has two effects. First, the MUX on the board
will be programmed accordingly. Second, the clock-frequency property
in the codec node in the device tree will be updated to the correct
value.
'audclk:11'
Select the 11.2896MHz clock
'audclk:12'
Select the 12.288MHz clock