mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 06:06:15 +09:00
b587acc6b1
U-Boot TPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200) Trying to boot from SPI U-Boot 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200) SoC: Rockchip rk3399 Reset cause: RST Model: Pine64 RockPro64 v2.1 DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: vidconsole Err: vidconsole Model: Pine64 RockPro64 v2.1 Net: eth0: ethernet@fe300000 Hit any key to stop autoboot: 0 => Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
36 lines
575 B
Plaintext
36 lines
575 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
|
|
*/
|
|
|
|
#include "rk3399-u-boot.dtsi"
|
|
#include "rk3399-sdram-lpddr4-100.dtsi"
|
|
/ {
|
|
aliases {
|
|
spi0 = &spi1;
|
|
};
|
|
|
|
chosen {
|
|
u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, &sdhci;
|
|
};
|
|
|
|
config {
|
|
u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
|
|
};
|
|
};
|
|
|
|
&spi1 {
|
|
spi_flash: flash@0 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
};
|
|
|
|
&vdd_center {
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <950000>;
|
|
};
|
|
|
|
&vdd_log {
|
|
regulator-init-microvolt = <950000>;
|
|
};
|