Matthew McClintock 9c6b47d53e p1014rdb: set ddr bus width properly depending on SVR ... Currently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2012-08-23 10:24:16 -05:00
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asm	p1014rdb: set ddr bus width properly depending on SVR	2012-08-23 10:24:16 -05:00