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https://github.com/brain-hackers/u-boot-brain
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92587b364b
Per CPUID:80000008h result, the maximum physical address bits of TunnelCreek processor is 32 instead of default 36. This will fix the incorrect decoding of MTRR range mask. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
46 lines
1.2 KiB
Plaintext
46 lines
1.2 KiB
Plaintext
#
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# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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config INTEL_QUEENSBAY
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bool
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select HAVE_FSP
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select HAVE_CMC
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if INTEL_QUEENSBAY
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config HAVE_CMC
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bool "Add a Chipset Micro Code state machine binary"
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help
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Select this option to add a Chipset Micro Code state machine binary
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to the resulting U-Boot image. It is a 64K data block of machine
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specific code which must be put in the flash for the processor to
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access when powered up before system BIOS is executed.
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config CMC_FILE
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string "Chipset Micro Code state machine filename"
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depends on HAVE_CMC
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default "cmc.bin"
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help
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The filename of the file to use as Chipset Micro Code state machine
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binary in the board directory.
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config CMC_ADDR
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hex "Chipset Micro Code state machine binary location"
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depends on HAVE_CMC
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default 0xfffb0000
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help
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The location of the CMC binary is determined by a strap. It must be
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put in flash at a location matching the strap-determined base address.
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The default base address of 0xfffb0000 indicates that the binary must
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be located at offset 0xb0000 from the beginning of a 1MB flash device.
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config CPU_ADDR_BITS
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int
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default 32
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endif
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