mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
140 lines
4.9 KiB
C
140 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arch/arm/cpu/armv7/rmobile/pfc-r8a7790.h
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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*/
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#ifndef __PFC_R8A7790_H__
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#define __PFC_R8A7790_H__
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#include <sh_pfc.h>
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#include <asm/gpio.h>
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#define CPU_32_PORT(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
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PORT_1(fn, pfx##31, sfx)
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#define CPU_32_PORT2(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_10(fn, pfx##2, sfx)
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#if defined(CONFIG_R8A7790)
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#define CPU_32_PORT1(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_10(fn, pfx##2, sfx) \
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/* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */
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#define CPU_ALL_PORT(fn, pfx, sfx) \
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CPU_32_PORT(fn, pfx##_0_, sfx), \
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CPU_32_PORT1(fn, pfx##_1_, sfx), \
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CPU_32_PORT2(fn, pfx##_2_, sfx), \
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CPU_32_PORT(fn, pfx##_3_, sfx), \
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CPU_32_PORT(fn, pfx##_4_, sfx), \
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CPU_32_PORT(fn, pfx##_5_, sfx)
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#elif defined(CONFIG_R8A7791)
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#define CPU_32_PORT1(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
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PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
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PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx)
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/*
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* GP_0_0_DATA -> GP_7_25_DATA
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* (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30]),GP1[31]
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* GP7[26],GP7[27],GP7[28],GP7[29]),GP7[30]),GP7[31])
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*/
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#define CPU_ALL_PORT(fn, pfx, sfx) \
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CPU_32_PORT(fn, pfx##_0_, sfx), \
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CPU_32_PORT1(fn, pfx##_1_, sfx), \
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CPU_32_PORT(fn, pfx##_2_, sfx), \
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CPU_32_PORT(fn, pfx##_3_, sfx), \
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CPU_32_PORT(fn, pfx##_4_, sfx), \
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CPU_32_PORT(fn, pfx##_5_, sfx), \
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CPU_32_PORT(fn, pfx##_6_, sfx), \
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CPU_32_PORT1(fn, pfx##_7_, sfx)
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#elif defined(CONFIG_R8A7792)
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/*
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* GP_0_0_DATA -> GP_11_29_DATA
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* (except for GP0[29..31],GP1[23..31],GP3[28..31],GP4[17..31],GP5[17..31]
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* GP6[17..31],GP7[17..31],GP8[17..31],GP9[17..31],GP11[30..31])
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*/
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#define CPU_32_PORT0_28(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
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PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
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PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx), \
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PORT_1(fn, pfx##26, sfx), PORT_1(fn, pfx##27, sfx), \
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PORT_1(fn, pfx##28, sfx)
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#define CPU_32_PORT0_22(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
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PORT_1(fn, pfx##22, sfx)
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#define CPU_32_PORT0_27(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
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PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
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PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
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PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx), \
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PORT_1(fn, pfx##26, sfx), PORT_1(fn, pfx##27, sfx)
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#define CPU_32_PORT0_16(fn, pfx, sfx) \
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PORT_10(fn, pfx, sfx), \
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PORT_1(fn, pfx##10, sfx),PORT_1(fn, pfx##11, sfx), \
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PORT_1(fn, pfx##12, sfx), PORT_1(fn, pfx##13, sfx), \
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PORT_1(fn, pfx##14, sfx), PORT_1(fn, pfx##15, sfx), \
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PORT_1(fn, pfx##16, sfx)
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#define CPU_ALL_PORT(fn, pfx, sfx) \
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CPU_32_PORT0_28(fn, pfx##_0_, sfx), \
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CPU_32_PORT0_22(fn, pfx##_1_, sfx), \
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CPU_32_PORT(fn, pfx##_2_, sfx), \
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CPU_32_PORT0_27(fn, pfx##_3_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_4_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_5_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_6_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_7_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_8_, sfx), \
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CPU_32_PORT0_16(fn, pfx##_9_, sfx), \
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CPU_32_PORT(fn, pfx##_10_, sfx), \
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CPU_32_PORT2(fn, pfx##_11_, sfx)
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#else
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#error "NO support"
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#endif
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#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
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#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
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GP##pfx##_IN, GP##pfx##_OUT)
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#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
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#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
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#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
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#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
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#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
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#define PORT_10_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
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PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
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PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
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PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
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PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
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#define CPU_32_PORT_REV(fn, pfx, sfx) \
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PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
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PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
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PORT_10_REV(fn, pfx, sfx)
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#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
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#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
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#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
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#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
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FN_##ipsr, FN_##fn)
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#endif /* __PFC_R8A7790_H__ */
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