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![Eugen Hristev](/assets/img/avatar_default.png)
Atmel PIT timer is not available for next products that have another timer hardware block. To be able to use the common at91 code, guard the code that uses PIT by ifdefs. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
81 lines
1.6 KiB
C
81 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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* (C) Copyright 2009
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* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* (C) Copyright 2013
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* Bo Shen <voice.shen@atmel.com>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <init.h>
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#include <vsprintf.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pit.h>
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#include <asm/arch/at91_gpbr.h>
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#include <asm/arch/clk.h>
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#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
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#define CONFIG_SYS_AT91_MAIN_CLOCK 0
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#endif
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int arch_cpu_init(void)
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{
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return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
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}
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void arch_preboot_os(void)
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{
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#if (IS_ENABLED(CONFIG_ATMEL_PIT_TIMER))
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ulong cpiv;
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at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
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cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
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/*
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* Disable PITC
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* Add 0x1000 to current counter to stop it faster
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* without waiting for wrapping back to 0
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*/
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writel(cpiv + 0x1000, &pit->mr);
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#endif
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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char buf[32];
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printf("CPU: %s\n", get_cpu_name());
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printf("Crystal frequency: %8s MHz\n",
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strmhz(buf, get_main_clk_rate()));
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printf("CPU clock : %8s MHz\n",
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strmhz(buf, get_cpu_clk_rate()));
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printf("Master clock : %8s MHz\n",
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strmhz(buf, get_mck_clk_rate()));
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return 0;
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}
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#endif
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void enable_caches(void)
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{
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icache_enable();
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dcache_enable();
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}
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#define ATMEL_CHIPID_CIDR_VERSION 0x1f
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unsigned int get_chip_id(void)
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{
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return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
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}
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unsigned int get_extension_chip_id(void)
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{
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return readl(ATMEL_CHIPID_EXID);
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}
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