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https://github.com/brain-hackers/u-boot-brain
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2be296538e
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.7 KiB
C
62 lines
1.7 KiB
C
/*
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* Copyright (C) 2016, Imagination Technologies Ltd.
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*
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* Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Imagination Technologies Ltd. MIPSfpga
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*/
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#ifndef __XILFPGA_CONFIG_H
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#define __XILFPGA_CONFIG_H
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/* BootROM + MIG is pretty smart. DDR and Cache initialized */
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/*--------------------------------------------
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* CPU configuration
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*/
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/* CPU Timer rate */
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#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
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/* Cache Configuration */
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#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
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/*----------------------------------------------------------------------
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* Memory Layout
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*/
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/* SDRAM Configuration (for final code, data, stack, heap) */
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
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#define CONFIG_SYS_MALLOC_LEN (256 << 10)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */
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/*----------------------------------------------------------------------
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* Commands
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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/*------------------------------------------------------------
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* Console Configuration
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*/
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
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/* -------------------------------------------------
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* Environment
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*/
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#define CONFIG_ENV_SIZE 0x4000
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/* ---------------------------------------------------------------------
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* Board boot configuration
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*/
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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#endif /* __XILFPGA_CONFIG_H */
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