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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-27 20:38:52 +09:00
444c46413f
For RV64, it will use sd instruction to clear t0 register, and the increament will be 8 bytes. So if the difference between__bss_strat and __bss_end was not 8 bytes aligned, the clear bss loop will overflow and acks like system hang. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
89 lines
1.2 KiB
Plaintext
89 lines
1.2 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*/
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OUTPUT_ARCH("riscv")
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ENTRY(_start)
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SECTIONS
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{
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. = ALIGN(4);
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.text : {
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arch/riscv/cpu/start.o (.text)
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}
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/* This needs to come before *(.text*) */
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.efi_runtime : {
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__efi_runtime_start = .;
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*(.text.efi_runtime*)
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*(.rodata.efi_runtime*)
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*(.data.efi_runtime*)
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__efi_runtime_stop = .;
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}
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.text_rest : {
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*(.text*)
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}
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : {
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__global_pointer$ = . + 0x800;
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*(.data*)
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}
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. = ALIGN(4);
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.got : {
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__got_start = .;
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*(.got.plt) *(.got)
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__got_end = .;
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}
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. = ALIGN(4);
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.u_boot_list : {
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KEEP(*(SORT(.u_boot_list*)));
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}
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. = ALIGN(4);
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.efi_runtime_rel : {
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__efi_runtime_rel_start = .;
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*(.rel*.efi_runtime)
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*(.rel*.efi_runtime.*)
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__efi_runtime_rel_stop = .;
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}
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. = ALIGN(4);
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/DISCARD/ : { *(.rela.plt*) }
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.rela.dyn : {
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__rel_dyn_start = .;
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*(.rela*)
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__rel_dyn_end = .;
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}
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. = ALIGN(4);
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.dynsym : {
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__dyn_sym_start = .;
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*(.dynsym)
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__dyn_sym_end = .;
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}
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. = ALIGN(4);
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_end = .;
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.bss : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(8);
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__bss_end = .;
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}
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}
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