mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-23 19:39:44 +09:00
9f3183d2d6
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
77 lines
1.2 KiB
C
77 lines
1.2 KiB
C
/*
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* Copyright 2014-2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <fsl_ifc.h>
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#include <fsl_csu.h>
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#include <i2c.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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#ifdef CONFIG_SPL_MMC_SUPPORT
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return BOOT_DEVICE_MMC1;
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#endif
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#ifdef CONFIG_SPL_NAND_SUPPORT
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return BOOT_DEVICE_NAND;
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#endif
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return 0;
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}
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u32 spl_boot_mode(void)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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#ifdef CONFIG_SPL_FAT_SUPPORT
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return MMCSD_MODE_FAT;
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#else
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return MMCSD_MODE_RAW;
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#endif
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case BOOT_DEVICE_NAND:
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return 0;
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default:
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puts("spl: error: unsupported device\n");
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hang();
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}
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}
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#ifdef CONFIG_SPL_BUILD
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void board_init_f(ulong dummy)
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{
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/* Set global data pointer */
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gd = &gdata;
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/* Clear global data */
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memset((void *)gd, 0, sizeof(gd_t));
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#ifdef CONFIG_LS2085A
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arch_cpu_init();
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#endif
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#ifdef CONFIG_FSL_IFC
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init_early_memctl_regs();
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#endif
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board_early_init_f();
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timer_init();
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#ifdef CONFIG_LS2085A
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env_init();
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#endif
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get_clocks();
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preloader_console_init();
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#ifdef CONFIG_SPL_I2C_SUPPORT
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i2c_init_all();
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#endif
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dram_init();
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/* Clear the BSS */
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memset(__bss_start, 0, __bss_end - __bss_start);
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board_init_r(NULL, 0);
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}
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#endif
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