mirror of
https://github.com/brain-hackers/u-boot-brain
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377ffcfabf
This is a workaround for 32 bit hardware limitation of TDM. T1040 has 36 bit physical addressing, TDM DMAC register are 32 bit wide but need to store address of CCSR space which lies beyond 32 bit address range. This workaround creats a LAW to enable access of TDM DMA to CCSR by mapping CCSR to overlap with DDR. A hole of 16M is created in memory using device tree. This workaround law is set only if "tdm" is defined in hwconfig. Also disable POST tests and add LIODN for TDM Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
86 lines
2.1 KiB
C
86 lines
2.1 KiB
C
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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#ifdef CONFIG_SYS_DPAA_QBMAN
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struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
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/* dqrr liodn, frame data liodn, liodn off, sdest */
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SET_QP_INFO(1, 27, 1, 0),
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SET_QP_INFO(2, 28, 1, 0),
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SET_QP_INFO(3, 29, 1, 1),
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SET_QP_INFO(4, 30, 1, 1),
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SET_QP_INFO(5, 31, 1, 2),
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SET_QP_INFO(6, 32, 1, 2),
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SET_QP_INFO(7, 33, 1, 3),
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SET_QP_INFO(8, 34, 1, 3),
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SET_QP_INFO(9, 35, 1, 0),
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SET_QP_INFO(10, 36, 1, 0),
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};
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#endif
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struct srio_liodn_id_table srio_liodn_tbl[] = {
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SET_SRIO_LIODN_1(1, 307),
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SET_SRIO_LIODN_1(2, 387),
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};
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int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
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struct liodn_id_table liodn_tbl[] = {
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#ifdef CONFIG_SYS_DPAA_QBMAN
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SET_QMAN_LIODN(62),
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SET_BMAN_LIODN(63),
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#endif
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SET_SDHC_LIODN(1, 552),
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SET_USB_LIODN(1, "fsl-usb2-mph", 553),
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SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 148),
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SET_DMA_LIODN(1, 147),
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SET_DMA_LIODN(2, 227),
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/* SET_NEXUS_LIODN(557), -- not yet implemented */
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SET_QE_LIODN(559),
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SET_TDM_LIODN(560),
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};
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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SET_FMAN_RX_1G_LIODN(1, 3, 91),
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SET_FMAN_RX_1G_LIODN(1, 4, 92),
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SET_FMAN_RX_1G_LIODN(1, 5, 93),
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};
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int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
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#endif
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struct liodn_id_table sec_liodn_tbl[] = {
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SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
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SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
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SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
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SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
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SET_SEC_RTIC_LIODN_ENTRY(a, 453),
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SET_SEC_RTIC_LIODN_ENTRY(b, 549),
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SET_SEC_RTIC_LIODN_ENTRY(c, 550),
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SET_SEC_RTIC_LIODN_ENTRY(d, 551),
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SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
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SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
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};
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int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
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struct liodn_id_table liodn_bases[] = {
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[FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(462, 558),
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#ifdef CONFIG_SYS_DPAA_FMAN
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[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
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#endif
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};
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