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9edefc2776
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
74 lines
1.2 KiB
C
74 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2007 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.eu>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <asm/asm.h>
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int dcache_status(void)
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{
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int i = 0;
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int mask = 0x80;
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__asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
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/* i&=0x80 */
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__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
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return i;
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}
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int icache_status(void)
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{
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int i = 0;
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int mask = 0x20;
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__asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
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/* i&=0x20 */
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__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
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return i;
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}
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void icache_enable(void)
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{
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MSRSET(0x20);
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}
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void icache_disable(void)
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{
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/* we are not generate ICACHE size -> flush whole cache */
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flush_cache(0, 32768);
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MSRCLR(0x20);
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}
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void dcache_enable(void)
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{
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MSRSET(0x80);
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}
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void dcache_disable(void)
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{
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#ifdef XILINX_USE_DCACHE
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flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
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#endif
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MSRCLR(0x80);
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}
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void flush_cache(ulong addr, ulong size)
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{
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int i;
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for (i = 0; i < size; i += 4)
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asm volatile (
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#ifdef CONFIG_ICACHE
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"wic %0, r0;"
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#endif
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"nop;"
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#ifdef CONFIG_DCACHE
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"wdc.flush %0, r0;"
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#endif
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"nop;"
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:
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: "r" (addr + i)
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: "memory");
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}
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